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LTM8020 Datasheet(PDF) 10 Page - Linear Technology |
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LTM8020 Datasheet(HTML) 10 Page - Linear Technology |
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10 / 24 page  LTM8050 10 8050fc For more information www.linear.com/LTM8050 PIN FUNCTIONS VOUT (Bank 1): Power Output Pins. Apply the output filter capacitor and the output load between these pins and GND pins. GND (Bank 2): Tie these GND pins to a local ground plane below the LTM8050 and the circuit components. In most applications, the bulk of the heat flow out of the LTM8050 is through these pads, so the printed circuit design has a large impact on the thermal performance of the part. See the PCB Layout and Thermal Considerations sections for more details. Return the feedback divider (RFB)tothisnet. VIN(Bank3):TheVINpinsuppliescurrenttotheLTM8050’s internal regulator and to the internal power switch. This pin must be locally bypassed with an external, low ESR capacitor; see Table 1 for recommended values. AUX (Pin G5): Low Current Voltage Source for BIAS. In many designs, the BIAS pin is simply connected to VOUT. The AUX pin is internally connected to VOUT and is placed adjacent to the BIAS pin to ease printed circuit board rout- ing. Although this pin is internally connected to VOUT, it is not intended to deliver a high current, so do not draw current from this pin to the load. If this pin is not tied to BIAS, leave it floating. BIAS(PinH5):TheBIASpinconnectstotheinternalpower bus. Connect to a power source greater than 2.8V and less than 25V. If the output is greater than 2.8V, connect this pin there. If the output voltage is less, connect this to a voltage source between 2.8V and 25V. Also, make sure that BIAS + VIN is less than 72V. RUN/SS (Pin L5): Pull the RUN/SS pin below 0.2V to shut down the LTM8050. Tie to 2.5V or more for normal operation. If the shutdown feature is not used, tie this pin to the VIN pin. RUN/SS also provides a soft-start function; see the Applications Information section. SYNC (Pin L6): This is the external clock synchronization input. Ground this pin for low ripple Burst Mode operation at low output loads. Tie to a stable voltage source greater than 0.7V to disable Burst Mode operation. Do not leave this pin floating. Tie to a clock source for synchroniza- tion. Clock edges should have rise and fall times faster than 1μs. See the Synchronization section in Applications Information. RT (Pin G7): The RT pin is used to program the switching frequency of the LTM8050 by connecting a resistor from this pin to ground. Table 2 gives the resistor values that correspondtotheresultantswitchingfrequency.Minimize the capacitance at this pin. SHARE (Pin H7): Tie this to the SHARE pin of another LTM8050 when paralleling the outputs. Otherwise, do not connect. PGOOD (Pin J7): The PGOOD pin is the open-collector outputofaninternalcomparator.PGOODremainslowuntil the FB pin is within 10% of the final regulation voltage. PGOODoutputisvalidwhenVINisabove3.6VandRUN/SS is high. If this function is not used, leave this pin floating. FB (Pin K7): The LTM8050 regulates its FB pin to 0.79V. Connect the adjust resistor from this pin to ground. The value of RFB is given by the equation RFB = 394.21/(VOUT – 0.79), where RFB is in kΩ. PACKAGE ROW AND COLUMN LABELING MAY VARY AMONG µModule PRODUCTS. REVIEW EACH PACKAGE LAYOUT CAREFULLY. |
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