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IC41C16256 Datasheet(PDF) 2 Page - Integrated Circuit Solution Inc

Part # IC41C16256
Description  256Kx16 bit Dynamic RAM with EDO Page Mode
Download  21 Pages
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Manufacturer  ICSI [Integrated Circuit Solution Inc]
Direct Link  http://www.icsi.com.tw
Logo ICSI - Integrated Circuit Solution Inc

IC41C16256 Datasheet(HTML) 2 Page - Integrated Circuit Solution Inc

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FEATURES
• Extended Data-Out (EDO) Page Mode access cycle
• TTL compatible inputs and outputs; tristate I/O
• Refresh Interval: 512 cycles /8 ms
• Refresh Mode: RAS-Only, CAS-before-RAS (CBR),
Hidden
• Single power supply:
5V ± 10% (IC41C16256)
3.3V ± 10% (IC41LV16256)
• Byte Write and Byte Read operation via two CAS
• Industrail Temperature Range -40oC to 85oC
Pb-free package is available
DESCRIPTION
The
ICSI IC41C16256 and IC41LV16256 is a 262,144 x 16-
bit high-performance CMOS Dynamic Random Access Memo-
ries. The IC41C16256 offer an accelerated cycle access
called EDO Page Mode. EDO Page Mode allows 512 random
accesses within a single row with access cycle time as short
as 10 ns per 16-bit word. The Byte Write control, of upper and
lower byte, makes the IC41C16256 ideal for use in
16-, 32-bit wide data bus systems.
These features make the IC41C16256and IC41LV16256 ideally
suited for high-bandwidth graphics, digital signal processing,
high-performance computing systems, and peripheral
applications.
The IC41C16256 is packaged in a 40-pin 400mil SOJ and
400mil TSOP-2.
IC41C16256
IC41LV16256
256K x 16 (4-MBIT) DYNAMIC RAM
WITH EDO PAGE MODE
KEY TIMING PARAMETERS
Parameter
-25(5V)
-35
-50
-60
Unit
Max. RAS Access Time (tRAC)
25355060
ns
Max. CAS Access Time (tCAC)
8
10
14
15
ns
Max. Column Address Access Time (tAA)
12182530
ns
Min. EDO Page Mode Cycle Time (tPC)
10122025
ns
Min. Read/Write Cycle Time (tRC)
456090
110
ns
40-Pin SOJ
PIN CONFIGURATIONS
40-Pin TSOP-2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
VCC
I/O0
I/O1
I/O2
I/O3
VCC
I/O4
I/O5
I/O6
I/O7
NC
NC
WE
RAS
NC
A0
A1
A2
A3
VCC
GND
I/O15
I/O14
I/O13
I/O12
GND
I/O11
I/O10
I/O9
I/O8
NC
LCAS
UCAS
OE
A8
A7
A6
A5
A4
GND
PIN DESCRIPTIONS
A0-A8
Address Inputs
I/O0-15
Data Inputs/Outputs
WE
Write Enable
OE
Output Enable
RAS
Row Address Strobe
UCAS
Upper Column Address Strobe
LCAS
Lower Column Address Strobe
Vcc
Power
GND
Ground
NC
No Connection
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
VCC
I/O0
I/O1
I/O2
I/O3
VCC
I/O4
I/O5
I/O6
I/O7
NC
NC
WE
RAS
NC
A0
A1
A2
A3
VCC
GND
I/O15
I/O14
I/O13
I/O12
GND
I/O11
I/O10
I/O9
I/O8
NC
LCAS
UCAS
OE
A8
A7
A6
A5
A4
GND


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