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HT27LC040 Datasheet(PDF) 4 Page - Holtek Semiconductor Inc

Part No. HT27LC040
Description  CMOS 512K 8-Bit OTP EPROM
Download  15 Pages
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Maker  HOLTEK [Holtek Semiconductor Inc]
Homepage  http://www.holtek.com
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HT27LC040 Datasheet(HTML) 4 Page - Holtek Semiconductor Inc

 
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Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
VCC
Conditions
Programming Operation
tAS
Address Setup Time
6V
¾
2
¾¾
ms
tOES
OE Setup Time
6V
¾
2
¾¾
ms
tDS
Data Setup Time
6V
¾
2
¾¾
ms
tAH
Address Hold Time
6V
¾
0
¾¾
ms
tDH
Data Hold Time
6V
¾
2
¾¾
ms
tDFP
Output Enable to Output Float Delay
6V
¾
0
¾
130
ns
tVPS
VPP Setup Time
6V
¾
2
¾¾
ms
tPW
CE Program Pulse Width
6V
¾
30
75
105
ms
tVCS
VCC Setup Time
6V
¾
2
¾¾
ms
tCES
CE Setup Time
6V
¾
2
¾¾
ms
tOE
Data Valid from OE
6V
¾¾
¾
150
ns
tPRT
VPP Pulse Rise Time During Programming
6V
¾
2
¾¾
ms
Test Waveforms and Measurements
Output Test Load
HT27LC040
Rev. 1.30
4
December 8, 2003
2 . 4 V
0 . 4 5 V
A C
M e a s u r e m e n t
L e v e l
A C D r i v i n g
L e v e l s
2 . 0 V
0 . 8 V
tR,tF< 20ns (10% to 90%)
1 . 3 V
( 1 N 9 1 4 )
O u t p u t P i n
C L
3 . 3 k W
Note: CL=100pF including jig capacitance
Functional Description
Programming of the HT27LC040
When the HT27LC040 is delivered, the chip has all
4096K bits in the
²ONE², or HIGH state. ²ZEROs² are
loaded into the HT27LC040 through programming.
The programming mode is entered when 12.5
±0.2V is ap-
plied to the VPP pin, OE is at VIH, and CE is VIL. For pro-
gramming, the data to be programmed is applied with 8
bits in parallel to the data pins.
The programming flowchart in Figure 3 shows the fast
interactive programming algorithm. The interactive al-
gorithm reduces programming time by using 30
msto
105
ms programming pulses and giving each address
only as many pulses as is necessary in order to reliably
program the data. After each pulse is applied to a given
address, the data in that address is verified. If the data
is not verified, additional pulses are given until it is veri-
fied or until the maximum number of pulses is reached
while sequencing through each address of the
HT27LC040. This process is repeated while sequenc-
ing through each address of the HT27LC040. This part
of the programming algorithm is done at VCC=6.0V to
assure that each EPROM bit is programmed to a suffi-
ciently high threshold voltage. This ensures that all bits
have sufficient margin. After the final address is com-
pleted, the entire EPROM memory is read at
VCC=VPP=3.3
±0.3V to verify the entire memory.
Program Inhibit Mode
Programming of multiple HT27LC040 in parallel with dif-
ferent data is also easily accomplished by using the Pro-
gram Inhibit Mode. Except for CE, all like inputs of the
parallel HT27LC040 may be common. A TTL low-level
program pulse applied to an HT27LC040 CE input with
VPP=12.5
±2V, and OE HIGH will program that
HT27LC040. A high-level CE input inhibits the
HT27LC040 from being programmed.


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