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CY7C006A-12AC Datasheet(PDF) 6 Page - Cypress Semiconductor

Part # CY7C006A-12AC
Description  32K/16K x8, 32K/16K x9 Dual-Port Static RAM
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7C006A-12AC Datasheet(HTML) 6 Page - Cypress Semiconductor

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CY7C006A/CY7C007A
CY7C016A/CY7C017A
Document #: 38-06045 Rev. *C
Page 6 of 20
Maximum Ratings[7]
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature .................................–65
°C to +150°C
Ambient Temperature with
Power Applied.............................................–55
°C to +125°C
Supply Voltage to Ground Potential ............... –0.3V to +7.0V
DC Voltage Applied to Outputs
in High Z State ............................................... –0.5V to +7.0V
DC Input Voltage[8] .........................................–0.5V to +7.0V
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage............................................ >2001V
Latch-Up Current..................................................... >200 mA
Notes:
7. The Voltage on any input or I/O pin cannot exceed the power pin during power-up.
8. Pulse width < 20 ns.
9. fMAX = 1/tRC = All inputs cycling at f = 1/tRC (except output enable). f = 0 means no address or control lines change. This applies only to inputs at CMOS level standby ISB3.
10. Tested initially and after any design or process changes that may affect these parameters.
Operating Range
Range
Ambient
Temperature
VCC
Commercial
0
°C to +70°C
5V
± 10%
Electrical Characteristics Over the Operating Range
Parameter
Description
CY7C006A
CY7C007A
CY7C016A
CY7C017A
Unit
-12[1]
-15
-20
Min.
Typ.
Max.
Min.
Typ.
Max. Min.
Typ.
Max.
VOH
Output HIGH Voltage
(VCC = Min., IOH = –4.0 mA)
2.4
2.4
2.4
V
VOL
Output LOW Voltage
(VCC = Min., IOH = +4.0 mA)
0.4
0.4
0.4
V
VIH
Input HIGH Voltage
2.2
2.2
2.2
V
VIL
Input LOW Voltage
0.8
0.8
0.8
V
IOZ
Output Leakage Current
–10
10
–10
10
–10
10
µA
ICC
Operating Current
(VCC = Max., IOUT = 0 mA)
Outputs Disabled
Com’l.
195
325
190
280
180
275
mA
Ind.
215
305
mA
ISB1
Standby Current
(Both Ports TTL Level)
CEL & CER ≥ VIH, f = fMAX
Com’l.
55
75
50
70
45
65
mA
Ind.
65
95
mA
ISB2
Standby Current
(One Port TTL Level)
CEL | CER ≥ VIH, f = fMAX
Com’l.
125
205
120
180
110
160
mA
Ind.
135
205
mA
ISB3
Standby Current
(Both Ports CMOS Level)
CEL & CER ≥ VCC − 0.2V,
f = 0
Com’l.
0.05
0.5
0.05
0.5
0.05
0.5
mA
Ind.
0.05
0.5
mA
ISB4
Standby Current
(One Port CMOS Level)
CEL | CER ≥ VIH, f = fMAX[8, 9]
Com’l.
115
185
110
160
100
140
mA
Ind.
125
175
mA
Capacitance Table[10]
Parameter
Description
Test Conditions
Max.
Unit
CIN
Input Capacitance
TA = 25°C, f = 1 MHz,
VCC = 5.0V
10
pF
COUT
Output Capacitance
10
pF


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