ADC08D500CIYB datasheet(9/33 Pages) AD

Part #	ADC08D500CIYB

Description	High Performance, Low Power, Dual 8-Bit, 500 MSPS A/D Converter

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Converter Electrical Characteristics (Continued)

The following specifications apply after calibration for V

A =VDR = +1.9VDC, OutV = 1.9V, VIN FSR (a.c. coupled) = differential

870mV

P-P,CL = 10 pF, Differential, a.c. coupled Sinewave Input Clock, fCLK = 500 MHz at 0.5VP-P with 50% duty cycle, VBG =

Floating, Non-Extended Control Mode, SDR Mode, R

EXT = 3300

Ω ±0.1%, Analog Signal Source Impedance = 100Ω Differen-

tial. Boldface limits apply for T

A =TMIN to TMAX. All other limits TA = 25˚C, unless otherwise noted. (Notes 6, 7)

Symbol

Parameter

Conditions

Typical

(Note 8)

Limits

(Note 8)

Units

(Limits)

ANALOG INPUT AND REFERENCE CHARACTERISTICS

C

IN

Analog Input Capacitance, Normal

operation (Notes 10, 11)

Differential

0.02

pF

Each input pin to ground

1.6

pF

Analog Input Capacitance, DES

Mode (Notes 10, 11)

Differential

0.08

pF

Each input pin to ground

2.2

pF

R

IN

Differential Input Resistance

100

94

Ω (min)

106

Ω (max)

ANALOG OUTPUT CHARACTERISTICS

V

CMO

Common Mode Output Voltage

1.26

0.95

1.45

V (min)

V (max)

V

CMO_LVL

V

CMO input threshold to set DC

Coupling mode

V

A = 1.8V

0.60

V

A = 2.0V

0.66

V

TC V

CMO

Common Mode Output Voltage

Temperature Coefficient

T

A = −40˚C to +85˚C

118

ppm/˚C

C

LOAD

V

CMO

Maximum V

CMO load Capacitance

80

pF

V

BG

Bandgap Reference Output

Voltage

I

BG = ±100 µA

1.26

1.20

1.33

V (min)

V (max)

TC V

BG

Bandgap Reference Voltage

Temperature Coefficient

T

A = −40˚C to +85˚C, IBG = ±100

µA

28

ppm/˚C

C

LOAD

V

BG

Maximum Bandgap Reference

Load Capacitance

80

pF

TEMPERATURE DIODE CHARACTERISTICS

∆V

BE

Temperature Diode Voltage

192 µA vs. 12 µA,

T

J = 25˚C

71.23

mV

192 µA vs. 12 µA,

T

J = 85˚C

85.54

mV

CHANNEL-TO-CHANNEL CHARACTERISTICS

Offset Error Match

1

LSB

Positive Full-Scale Error Match

Zero offset selected in Control

Register

1

LSB

Negative Full-Scale Error Match

Zero offset selected in Control

Register

1

LSB

Phase Matching (I,Q)

F

IN = 1.0 GHz

< 1

Degree

X-TALK

Crosstalk from I (Agressor) to Q

(Victim) Channel

Aggressor = 867 MHz F.S.

Victim = 100 MHz F.S.

−71

dB

X-TALK

Crosstalk from Q (Agressor) to I

(Victim) Channel

Aggressor = 867 MHz F.S.

Victim = 100 MHz F.S.

-71

dB

CLOCK INPUT CHARACTERISTICS

V

ID

Differential Clock Input Level

Sine Wave Clock

0.6

0.4

2.0

V

P-P (min)

V

P-P (max)

Square Wave Clock

0.6

0.4

2.0

V

P-P (min)

V

P-P (max)

I

Input Current

V

IN =0orVIN =VA

±1µA

C

IN

Input Capacitance (Notes 10, 11)

Differential

0.02

pF

Each input to ground

1.5

pF

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