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IS41C16256-60T Datasheet(PDF) 3 Page - Integrated Circuit Solution Inc |
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IS41C16256-60T Datasheet(HTML) 3 Page - Integrated Circuit Solution Inc |
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3 / 20 page  IS41C16256 IS41LV16256 Integrated Circuit Solution Inc. 3 DR001-0E 01/25/2002 TRUTH TABLE Function RAS RAS RAS RAS RAS LCAS LCAS LCAS LCAS LCAS UCAS UCAS UCAS UCAS UCAS WE WE WE WE WE OE OE OE OE OE Address tR/tC I/O Standby H H H X X X High-Z Read: Word L L L H L ROW/COL DOUT Read: Lower Byte L L H H L ROW/COL Lower Byte, DOUT Upper Byte, High-Z Read: Upper Byte L H L H L ROW/COL Lower Byte, High-Z Upper Byte, DOUT Write: Word (Early Write) L L L L X ROW/COL DIN Write: Lower Byte (Early Write) L L H L X ROW/COL Lower Byte, DIN Upper Byte, High-Z Write: Upper Byte (Early Write) L H L L X ROW/COL Lower Byte, High-Z Upper Byte, DIN Read-Write(1,2) LL L H →LL→H ROW/COL DOUT, DIN EDO Page-Mode Read(2) 1st Cycle: L H →LH→L H L ROW/COL DOUT 2nd Cycle: L H →LH→L H L NA/COL DOUT Any Cycle: L L →HL→H H L NA/NA DOUT EDO Page-Mode Write(1) 1st Cycle: L H →LH→L L X ROW/COL DIN 2nd Cycle: L H →LH→L L X NA/COL DIN EDO Page-Mode 1st Cycle: L H →LH→LH→LL→H ROW/COL DOUT, DIN Read-Write(1,2) 2nd Cycle: L H →LH→LH→LL→H NA/COL DOUT, DIN Hidden Refresh(2) Read L →H→L L L H L ROW/COL DOUT Write L →H→L L L L X ROW/COL DOUT RAS-Only Refresh L H H X X ROW/NA High-Z CBR Refresh(3) H →L L L X X X High-Z Notes: 1. These WRITE cycles may also be BYTE WRITE cycles (either LCAS or UCAS active). 2. These READ cycles may also be BYTE READ cycles (either LCAS or UCAS active). 3. At least one of the two CAS signals must be active (LCAS or UCAS). |
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