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S1D2512X01-A0B0 Datasheet(PDF) 11 Page - Samsung semiconductor

Part # S1D2512X01-A0B0
Description  DEFLECTION PROCESSOR FOR MULTISYNC MONITORS
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Manufacturer  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

S1D2512X01-A0B0 Datasheet(HTML) 11 Page - Samsung semiconductor

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DEFLECTION PROCESSOR FOR MULTISYNC MONITORS
S1D2512X01
10
Max. sourced current on VREF-H
IREF-H
Pin 13
5
mA
Max. sourced current on VREF-V
IREF-V
Pin 21
5
mA
1st PLL SECTION
Polarity integration delay
HpoIT
Pin 1
0.75
ms
VCO control voltage (pin 7)
VVCO
VREF-H = 8V
fo
fH (Max.)
1.3
6.2
V
V
VCO gain (pin 7)
VCOG
Ro = 6.49K
Ω,
Co = 820pF,
dF/dV = 1/11RoCo
17
kHz/V
Horizontal phase adjustment (see 11)
Hph
% of horizontal period
±10
%
Horizontal phase setting value (Pin 8)
(see 11)
Minimum current value
Typical value
Maximum value
Hphmin
Hphtyp
Hphmax
Sub-address 01
Byte x 1111111
Byte x 1000000
Byte x 0000000
2.8
3.4
4.0
V
V
V
PLL1 filter current charge
IPII1U
IPII1L
PLL1 is unlocked
PLL1 is locked
±140
±1
µA
mA
Free running frequency
fo
Ro = 6.49K
Ω,
Co = 820pF,
fo = 0.97/8RoCo
22.8
kHz
Free running frequency thermal drift (no
drift on external components) (see 7)
dF0/dT
-150
ppm/c
Free running frequency adjustment
Minimum value
Maximum value
fo(Min.)
fo(Max.)
Sub-address 02
Byte x x x 11111
Byte x x x 00000
0.8
1.3
Fo
Fo
PLL1 capture range
CR
Ro = 6.49K
Ω,
Co = 820pF,
from fo + 0.5kHz to
4.5Fo (fo:22.8kHz)
fH (min.)
fH (max.)
100
23.5
kHz
kHz
Safe forced frequency
SF1 Byte 11 x x x x x x
SF2 Byte 10 x x x x x x
SFF
Sub-address 02
2F0
3F0
2ND PLL SECTION HORIZONTAL OUTPUT SECTION
Flyback input threshold
voltage (pin12)
FBth
0.65
0.75
V
Horizontal jitter
Hjit
At 31.4kHz
70
ppm
Table 9. Horizontal Section Electrical Characteristics (Continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit


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