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MP5402M Datasheet(PDF) 14 Page - Monolithic Power Systems

Part No. MP5402M
Description  5A, 36V, Frequency Selectable Step-Down Converter with Smart Dual USB Charging Ports
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Maker  MPS [Monolithic Power Systems]
Homepage  http://www.monolithicpower.com
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MP5402M Datasheet(HTML) 14 Page - Monolithic Power Systems

 
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MP5402M – STEP-DOWN CONVERTER WITH SMART DUAL USB CHARGING PORTS
MP5402M Rev.1.0
www.MonolithicPower.com
14
10/10/2015
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
APPLICATION INFORMATION
COMPONENT SELECTION
Selecting the Inductor
For most applications, an inductor with a DC
current rating at least 25% higher than the
maximum load current is recommended. Select
an inductor with small DC resistance for
optimum efficiency. The inductor value for most
designs can be derived from Equation (1):
OUT
IN
OUT
1
IN
L
OSC
V(V
V
)
L
VI
f
×−
=
×Δ ×
(1)
Where ΔIL is the inductor ripple current.
Set the inductor ripple current to approximately
30% of the maximum load current. The
maximum inductor peak current is shown in
Equation (2):
2
I
I
I
L
LOAD
)
MAX
(
L
Δ
+
=
(2)
Typically, 22μH inductance is recommended to
improve EMI.
Selecting the Buck Input Capacitor
The input current to the step-down converter is
discontinuous and therefore requires a capacitor to
supply the AC current while maintaining the DC
input voltage. Use low ESR capacitors for optimum
performance. Ceramic capacitors with X5R or
X7R dielectrics are highly recommended
because
of
their
low
ESR
and
small
temperature coefficients. For a CLA application,
a 100µF electrolytic capacitor and two 10µF
ceramic capacitors are recommended.
Since the input capacitor (C1) absorbs the input
switching current, it requires an adequate ripple-
current rating. The RMS current in the input
capacitor can be estimated with Equation (3):
×
×
=
IN
OUT
IN
OUT
LOAD
1
C
V
V
1
V
V
I
I
(3)
The worse case condition occurs at VIN = 2VOUT,
shown in Equation (4):
2
I
I
LOAD
1
C =
(4)
For simplification, choose an input capacitor
with an RMS current rating of greater than half
of the maximum load current.
The input capacitor can be electrolytic, tantalum,
or ceramic. When using an electrolytic capacitor,
place two additional high-quality ceramic
capacitors as close to VIN as possible. Estimate
the input voltage ripple caused by the
capacitance with Equation (5):
LOAD
OUT
OUT
IN
IN
SIN
IV
V
V1
fC1
V
V
⎛⎞
Δ=
×
× −
⎜⎟
×
⎝⎠
(5)
Selecting the Buck Output Capacitor
The device requires an output capacitor (C2) to
maintain the DC output voltage. Estimate the
output voltage ripple with Equation (6):
OUT
OUT
OUT
ESR
S1
IN
S
VV
1
V1
R
fL
V
8 f
C2
⎛⎞
⎛⎞
Δ=
× −
×
+
⎜⎟
⎜⎟
×× ×
⎝⎠ ⎝⎠
(6)
Where L1 is the inductor value and RESR is the
equivalent series resistance (ESR) value of the
output capacitor.
For an electrolytic capacitor, ESR dominates
the impedance at the switching frequency. For
simplification,
the
output
ripple
can
be
approximated with Equation (7):
OUT
OUT
OUT
ESR
IN
S1
VV
ΔV1
R
fL
V
⎛⎞
=× −
×
⎜⎟
×
⎝⎠
(7)
The characteristics of the output capacitor
affect the stability of the regulatory system. A
low ESR electrolytic capacitor is recommended
for a low output ripple and good control loop
stability. For a CLA application, a 1µF ceramic
capacitor and a 270µF polymer/electrolytic
capacitor with ~20mΩ ESR are recommended.
PCB Layout Guidelines(8)
Efficient PCB layout is critical for achieving
stable operation and thermal dissipation. For
best results, refer to Figure 5 and follow the
guidelines below:
1. Use short, direct, and wide traces to
connect OUT. Adding vias under the IC
and routing the OUT trace on both PCB
layers is highly recommended.
2. Use a large copper plane for PGND.
Add multiple vias to improve thermal
dissipation.
3. Connect
AGND
to
PGND.


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