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VT83C469 Datasheet(PDF) 15 Page - List of Unclassifed Manufacturers |
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VT83C469 Datasheet(HTML) 15 Page - List of Unclassifed Manufacturers |
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15 / 36 page  VIA Technologies, Inc. Preliminary VT83C469 15 Address : Index ( Base + 06h ) BIT FUNCTION D[7:6] I/O Window Enable [1:0]. 0: Inhibit the card enable signals to the PC Card when an I/O access occurs within the corresponding I/O address window. 1: Generate the card enable signals to PC card when an I/O access occurs within the corresponding I/O address window. I/O accesses pass addresses from the system bus directly through to the PC Card. The start and stop register pairs must all be set to the desired window values before setting this bit to one. D5 MS16# Decode A23:12. 0: Generated MS16# from a decode of the system address lines A23:17 only. This means that a minimum, a 128K block of system memory address space is set aside as 16-bit memory only. 1: Generated MS16# from a decode of the system address lines A23:12. D4 Memory Window 4 Enable. 0: Inhibit the card enable signals to the PC Card when a memory access occurs within the corresponding system memory address window. 1: Generate the card enable signals when a memory access occurs within the corresponding system memory address window. When the system address is within the window, the computed address will be generated to the PC Card. D3 Memory Window 3 Enable. 0: Inhibit the card enable signals to the PC Card when a memory access occurs within the corresponding system memory address window. 1: Generate the card enable signals when a memory access occurs within the corresponding system memory address window. When the system address is within the window, the computed address will be generated to the PC Card. D2 Memory Window 2 Enable. 0: Inhibit the card enable signals to the PC Card when a memory access occurs within the corresponding system memory address window. 1: Generate the card enable signals when a memory access occurs within the corresponding system memory address window. When the system address is within the window, the computed address will be generated to the PC Card. D1 Memory Window 1 Enable. 0: Inhibit the card enable signals to the PC Card when a memory access occurs within the corresponding system memory address window. 1: Generate the card enable signals when a memory access occurs within the corresponding system memory address window. When the system address is within the window, the computed address will be generated to the PC Card. D0 Memory Window 0 Enable. 0: Inhibit the card enable signals to the PC Card when a memory access occurs within the corresponding system memory address window. 1: Generate the card enable signals when a memory access occurs within the corresponding system memory address window. When the system address is within the window, the computed address will be generated to the PC Card. NOTE: The start, stop and offset registers pairs must all be set to the desired window values before setting bit to one.( All Memory Windows ). |
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