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PNX1501G Datasheet(PDF) 10 Page - NXP Semiconductors |
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PNX1501G Datasheet(HTML) 10 Page - NXP Semiconductors |
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10 / 100 page  Philips Semiconductors PNX15xx Series Volume 1 of 1 12NC 9397 750 14321 © Koninklijke Philips Electronics N.V. 2002-2003-2004. All rights reserved. Product data sheet Rev. 2 — 1 December 2004 -10 3.3 Pattern Matching Join Register . . . . . . . . . . . 23-25 4. Descriptor and Status Formats . . . . . . . . 23-27 4.1 Receive Descriptors and Status . . . . . . . . . . 23-27 4.2 Transmit Descriptors and Status . . . . . . . . . . 23-30 5. LAN100 Functions . . . . . . . . . . . . . . . . . . . . . 23-33 5.1 MMIO Interface . . . . . . . . . . . . . . . . . . . . . . . . . 23-33 5.1.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-33 5.2 Direct Memory Access. . . . . . . . . . . . . . . . . . . 23-34 5.2.1 Descriptor FIFOs . . . . . . . . . . . . . . . . . . . . . . . 23-34 5.2.2 Ownership of Descriptors . . . . . . . . . . . . . . . . 23-34 5.2.3 Sequential Order with Wrap-around . . . . . . . 23-35 5.2.4 Full and Empty State of FIFOs. . . . . . . . . . . . 23-35 5.2.5 Interrupt Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-36 5.2.6 Packet Fragments . . . . . . . . . . . . . . . . . . . . . . 23-36 5.3 Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-37 5.4 Transmit process . . . . . . . . . . . . . . . . . . . . . . . 23-38 5.4.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-38 5.4.2 Device Driver Sets Up Descriptors and Data23-38 5.4.3 Tx(Rt) DMA Manager Reads Tx(Rt) Descriptor Arrays23-39 5.4.4 Tx(Rt) DMA manager transmits data . . . . . . 23-39 5.4.5 Update ConsumeIndex . . . . . . . . . . . . . . . . . . 23-40 5.4.6 Write Transmission Status . . . . . . . . . . . . . . . 23-40 5.4.7 Transmission Error Handling . . . . . . . . . . . . . 23-40 5.4.8 Transmit Triggers Interrupts . . . . . . . . . . . . . . 23-41 5.4.9 Transmit example . . . . . . . . . . . . . . . . . . . . . . . 23-42 5.5 Receive process . . . . . . . . . . . . . . . . . . . . . . . . 23-45 5.5.1 Device Driver Sets Up Descriptors . . . . . . . . 23-46 5.5.2 Rx DMA Manager Reads Rx Descriptor Arrays . . 23-46 5.5.3 Rx DMA Manager Receives Data . . . . . . . . . 23-46 5.5.4 Update ProduceIndex . . . . . . . . . . . . . . . . . . . 23-47 5.5.5 Write Reception Status . . . . . . . . . . . . . . . . . . 23-47 5.5.6 Reception Error Handling . . . . . . . . . . . . . . . . 23-47 5.5.7 Receive Triggers Interrupts . . . . . . . . . . . . . . 23-48 5.5.8 Device Driver Processes Receive Data . . . . 23-49 5.5.9 Receive example . . . . . . . . . . . . . . . . . . . . . . . 23-49 5.6 Transmission Retry . . . . . . . . . . . . . . . . . . . . . 23-53 5.7 time-stamps . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-53 5.8 Transmission modes . . . . . . . . . . . . . . . . . . . . 23-53 5.8.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-53 5.8.2 Real-time/non-real-time transmission mode 23-54 5.8.3 Quality-of-service Transmission Mode . . . . . 23-57 5.9 Duplex Modes . . . . . . . . . . . . . . . . . . . . . . . . . . 23-58 5.10 IEEE 802.3/Clause 31 Flow Control . . . . . . . 23-59 5.10.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-59 5.10.2 Receive Flow Control . . . . . . . . . . . . . . . . . . . . 23-59 5.10.3 Transmit Flow Control . . . . . . . . . . . . . . . . . . . 23-59 5.11 Half-duplex Mode Back Pressure. . . . . . . . . . 23-61 5.12 Receive filtering . . . . . . . . . . . . . . . . . . . . . . . . . 23-62 5.12.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-62 5.12.2 Unicast, Broadcast and Multicast. . . . . . . . . . 23-64 5.12.3 Perfect Address Match. . . . . . . . . . . . . . . . . . . 23-64 5.12.4 Imperfect Hash Filtering. . . . . . . . . . . . . . . . . . 23-64 5.12.5 Pattern Match Filtering and Logic Functions 23-65 5.12.6 Enabling and Disabling Filtering . . . . . . . . . . . 23-66 5.12.7 Runt Frames . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-66 5.13 Wake-up on LAN . . . . . . . . . . . . . . . . . . . . . . . . 23-66 5.13.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-66 5.13.2 Filtering for WoL . . . . . . . . . . . . . . . . . . . . . . . . 23-67 5.13.3 Magic Packet WoL . . . . . . . . . . . . . . . . . . . . . . 23-67 5.14 Enabling and Disabling Receive and Transmit 23- 68 5.14.1 Enabling and Disabling Reception . . . . . . . . . 23-68 5.14.2 Enabling and Disabling Transmission . . . . . . 23-69 5.15 Transmission Padding and CRC . . . . . . . . . . 23-69 5.16 Huge Frames and Frame Length Checking . 23-70 5.17 Statistics Counters . . . . . . . . . . . . . . . . . . . . . . 23-71 5.18 Status Vectors . . . . . . . . . . . . . . . . . . . . . . . . . . 23-71 5.19 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-71 5.19.1 Hard Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-71 5.19.2 Soft Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-71 6. System Integration . . . . . . . . . . . . . . . . . . . . . 23-73 6.1 MII Interface I/O. . . . . . . . . . . . . . . . . . . . . . . . . 23-73 6.2 Power Management . . . . . . . . . . . . . . . . . . . . . 23-74 6.2.1 Sleep Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-74 6.2.2 Coma Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-74 6.3 Disabling the LAN100. . . . . . . . . . . . . . . . . . . . 23-75 6.4 Little/big Endian . . . . . . . . . . . . . . . . . . . . . . . . . 23-75 6.5 Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-75 6.6 Errors and Aborts . . . . . . . . . . . . . . . . . . . . . . . 23-75 6.7 Cache coherency . . . . . . . . . . . . . . . . . . . . . . . 23-76 Chapter 24: TM3260 Debug 1. Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-1 1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-1 2. Functional Description . . . . . . . . . . . . . . . . . 24-1 2.1 General Operations . . . . . . . . . . . . . . . . . . . . . . 24-1 2.1.1 Test Access Port (TAP). . . . . . . . . . . . . . . . . . . 24-1 2.1.2 TAP Controller. . . . . . . . . . . . . . . . . . . . . . . . . . . 24-2 2.1.3 PNX15xx Series JTAG Instruction Set . . . . . . 24-4 3. Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-4 3.1 Register Programming Guidelines . . . . . . . . . . 24-4 3.1.1 Handshaking and Communication Protocol . . 24-5 3.2 Debug Settings . . . . . . . . . . . . . . . . . . . . . . . . . . 24-6 4. Register Descriptions . . . . . . . . . . . . . . . . . . . 24-7 4.1 Register Summary . . . . . . . . . . . . . . . . . . . . . . . 24-9 Chapter 25: I2C Interface 1. Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25-1 1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25-2 2. Functional Description . . . . . . . . . . . . . . . . . 25-2 2.1 General Operations . . . . . . . . . . . . . . . . . . . . . . 25-2 2.1.1 IIC Arbitration and Control Logic . . . . . . . . . . . 25-2 2.1.2 Serial Clock Generator. . . . . . . . . . . . . . . . . . . . 25-3 |
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