PI74FCT16646T/162646T/162H646T

16-Bit Registered Transceivers

2

PS2039B

02/24/99

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1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

56

55

54

53

52

51

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

25

26

27

28

32

31

30

29

1

DIR

1

CLKAB

1

SAB

GND

1

1

VCC

1

1

1

GND

1

1

1

2

2

2

GND

2

2

2

2

2

GND

2

SAB

2

CLKAB

2

DIR

1

OE

1

CLKBA

1

SBA

GND

1

1

VCC

1

1

1

GND

1

1

1

2

2

2

GND

2

2

2

2

2

GND

2

SBA

2

CLKBA

2

OE

Product Pin Configuration

Notes:

1.The data output functions may be enabled or disabled by various signals at the xOE or xDIR inputs.

Data input functions are always enabled, i.e., data at the bus pins will be stored on every low-to-high transition on the clock inputs.

2. Select control = L: clocks can occur simultaneously.

Select control = H: clocks must be staggered to load both registers.

H = High Voltage Level; L = Low Voltage Level; X = Don’t Care;

↑ = LOW-to-HIGH transition

Pin Name

Description

Data Register A Inputs

Data Register B Outputs

Data Register B Inputs

Data Register A Outputs

xCLKAB, xCLKBA

Clock Pulse Inputs

SAB, SBA

Output Data Source Select Inputs

xDIR, xOE

Output Enable Inputs

GND

Ground

Power

Note: 1.For the PI74FCT162H646T, these pins have

“Bus Hold.” All other pins are standard, outputs, or I/Os.

Product Pin Description

Inputs

DATA I/O

(2)

Function/Operation

xOE

X

DIR

X

CLKAB

X

CLKBA

X

SAB

X

SBA

X

Isolation

H

X

H or L

H or L

X

X

Input

Input

Store A and B Data

H

X

↑↑

XX

Real Time B Data to A Bus

L

L

X

X

X

L

Output

Input

Stored B Data to A Bus

L

L

X

H or L

X

H

Real Time A Data to B Bus

L

H

X

X

L

X

Input

Output

Stored A Data to B Bus

L

H

H or L

X

H

X

Truth Table

56-PIN

V56

A56

K56