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IDT70V05L20PFI Datasheet(PDF) 9 Page - Integrated Device Technology

Part No. IDT70V05L20PFI
Description  HIGH-SPEED 3.3V 8K x 8 DUAL-PORT STATIC RAM
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT70V05L20PFI Datasheet(HTML) 9 Page - Integrated Device Technology

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6.42
IDT70V05S/L
High-Speed 8K x 8 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
9
Waveform of Read Cycles(5)
NOTES:
1. Timing depends on which signal is asserted last,
OE or CE.
2. Timing depends on which signal is de-asserted first
CE or OE.
3. tBDD delay is required only in cases where the opposite port is completing a write operation to the same address location. For simultaneous read operations
BUSY has no
relation to valid output data.
4. Start of valid data depends on which timing becomes effective last tAOE, tACE, tAA or tBDD.
5.
SEM = VIH.
tRC
R/
W
CE
ADDR
tAA
OE
2941 drw 07
(4)
tACE
(4)
tAOE
(4)
(1)
tLZ
tOH
(2)
tHZ
(3,4)
tBDD
DATAOUT
BUSYOUT
VALID DATA
(4)


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