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W65C02S6P-14 Datasheet(PDF) 36 Page - List of Unclassifed Manufacturers |
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W65C02S6P-14 Datasheet(HTML) 36 Page - List of Unclassifed Manufacturers |
36 / 40 page The Western Design Center, Inc. W65C02S Datasheet The Western Design Center, Inc. W65C02S Datasheet 36 7 CAVEATS Table 7-1 Microprocessor Operational Enhancements Function NMOS 6502 W65C02S Indexed addressing across page boundary Extra read of invalid address. Extra read of last instruction byte. Execution of invalid OpCodes. Some terminate only by reset. Results are undefined. All are NOP's (reserved for future use). OpCode Bytes Cycles 02,22,42,62,82 2 2 C2, E2 X3,OB-BB,EB,FB 1 1 44 2 3 54,D4,F4 2 4 5C 3 8 DC,FC 3 4 Jump indirect, operand = XXFF. Page address does not increment. Page address increments, one additional cycle. Read/Modify/Write instruction at effective address. One read and two write cycles. Two read and one write cycle. Decimal flag. Indeterminate after reset. Initialized to binary mode (D=0) after reset and interrupts. Flags after decimal operation. Invalid N, V and Z flags. Valid flags. One additional cycle. Interrupt after fetch of BRK instruction Interrupt vector is loaded; BRK vector is ignored. BRK is executed, and then interrupt is executed. Ready. Input. Bi-directional, WAI instruction pulls low. Read/Modify/Write instructions absolute indexed in same page. Seven cycles. Six cycles. Oscillator. Requires external active components. Crystal or RC network will oscillate when connected between PHI2 and PHI10. Assertion of Ready (RDY) during write operations. Ignored. Stops p rocessor during PHI2, and WAI instruction pulls RDY low. Clock inputs. PHI2 is the only required clock. PHI2 is the only required clock. Unused input-only pins. Must be tied to VDD. Must be tied to VDD. The BRK instruction for both the NMOS 6502 and 65C02 is a 2 byte instruction. The NMOS and CMOS devices simply skips the second byte (i.e. doesn’t care about the second byte) by incrementing the program counter twice. It is important to realize that if a return from interrupt is used it will return to the location after the second or signature byte. |
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