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U6264BSA07LL Datasheet(PDF) 5 Page - Zentrum Mikroelektronik Dresden AG |
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U6264BSA07LL Datasheet(HTML) 5 Page - Zentrum Mikroelektronik Dresden AG |
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5 / 9 page  5 April 20, 2004 U6264B Switching Characteristics Symbol Min. Max. Unit Alt. IEC Time to Output in Low-Z tLZ tt(QX) 510 ns Cycle Time Write Cycle Time Read Cycle Time tWC tRC tcW tcR 70 70 ns ns Access Time E1 LOW or E2 HIGH to Data Valid G LOW to Data Valid Address to Data Valid tACE tOE tAA ta(E) ta(G) ta(A) - - - 70 40 70 ns ns ns Pulse Widths Write Pulse Width Chip Enable to End of Write tWP tCW tw(W) tw(E) 50 65 ns ns Setup Times Address Setup Time Chip Enable to End of Write Write Pulse Width Data Setup Time tAS tCW tWP tDS tsu(A) tsu(E) tsu(W) tsu(D) 0 65 50 35 ns ns ns ns Data Hold Time Address Hold from End of Write tDH tAH th(D) th(A) 0 0 ns ns Output Hold Time from Address Change tOH tv(A) 5ns E1 HIGH or E2 LOW to Output in High-Z W LOW to Output in High-Z G HIGH to Output in High-Z tHZCE tHZWE tHZOE tdis(E) tdis(W) tdis(G) 0 0 0 25 30 25 ns ns ns Data Retention Mode E1-Controlled Data Retention 4.5 V tDR trec VCC E1 VCC(DR) ≥ 2 V VE2(DR) ≥ VCC(DR) - 0.2 V or VE2(DR) ≤ 0.2 V VCC(DR) - 0.2 V ≤ VE1(DR) ≤ VCC(DR) + 0.3 V 0 V 2.2 V 2.2 V VCC(DR) ≥ 2 V Data Retention Mode E2-Controlled Data Retention trec tDR 0.8 V 0.8 V VE2(DR) ≤ 0.2 V 4.5 V 0 V VCC E2 Chip Deselect to Data Retention Time tDR : min 0 ns Operating Recovery Time trec : min tcR |
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