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MPQ4433 Datasheet(PDF) 19 Page - Monolithic Power Systems |
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MPQ4433 Datasheet(HTML) 19 Page - Monolithic Power Systems |
19 / 31 page MPQ4433 - 36V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER MPQ4433 Rev. 1.0 www.MonolithicPower.com 19 9/19/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. OPERATION The MPQ4433 is a high-frequency, synchronous, rectified, step-down, switch-mode converter with integrated, internal, high-side and low-side power MOSFETs. The MPQ4433 offers a very compact solution that achieves 3A of continuous output current with excellent load and line regulation over a wide 3.3V to 36V input supply range. The MPQ4433 features switching frequency programmable from 350kHz to 2.5MHz, external soft start, power good indication, and precision current limit. Its very low operational quiescent current makes it suitable for battery-powered applications. Pulse Width Modulation (PWM) Control At moderate-to-high output current, the MPQ4433 operates in a fixed-frequency, peak- current-control mode to regulate the output voltage. An internal clock initiates a PWM cycle. At the rising edge of the clock, the high-side power MOSFET (HS-FET) is turned on, and the inductor current rises linearly to provide energy to the load. The HS-FET remains on until its current reaches the value set by the COMP voltage (VCOMP), which is the output of the internal error amplifier. If the current in the HS- FET does not reach VCOMP in one PWM period, the HS-FET remains on, saving a turn-off operation. When the HS-FET is off, it remains off until the next clock cycle begins. The low- side MOSFET (LS-FET) turns on immediately while the inductor current flows through it. To avoid a shoot-through, dead time is inserted to prevent the HS-FET and LS-FET from turning on at the same time. For each turn on and off in a switching cycle, the HS-FET remains on and off with a minimum on and off time limit. Forced CCM Mode and AAM Mode The MPQ4433 has selectable forced continuous conduction mode (CCM) and advanced asynchronous mode (AAM) (see Figure 3). Drive SYNC above its specified threshold before the chip starts up to force the device into CCM with a fixed frequency, regardless of the output load current. Once the device is in CCM, SYNC can be pulled low again or driven with an external clock if needed. The advantage of CCM is a controllable frequency and smaller output ripple, but it also has low efficiency at light load. Drive SYNC below its specified threshold or leave SYNC floating before the chip starts up to enable AAM power-save mode. The MPQ4433 first enters non-synchronous operation for as long as the inductor current approaches zero at light load. If the load is further decreased or is at no load, making VCOMP below the internally set AAM value (VAAM), the MPQ4433 enters sleep mode, consuming very low quiescent current to further improve light-load efficiency. In sleep mode, the internal clock is blocked first, and the MPQ4433 skips some pulses. Since the FB voltage (VFB) is lower than the internal 0.8V reference (VREF), VCOMP ramps up until it crosses over VAAM. Then the internal clock is reset, and the crossover time is taken as the benchmark of the next clock. This control scheme helps achieve high efficiency by scaling down the frequency to reduce switching and gate driver losses during light-load or no-load conditions. When the output current increases from light load condition, VCOMP becomes larger, and the switching frequency increases. If the DC value of VCOMP exceeds VAAM, the operation mode resumes discontinuous conduction mode (DCM) or CCM, which have a constant switching frequency. Forced CCM Inductor Current t t t Load Decreased AAM Inductor Current t t t Load Decreased Figure 3: Forced CCM and AAM Error Amplifier (EA) The error amplifier compares VFB with VREF and outputs a current proportional to the difference between the two. This output current then charges or discharges the internal compensation network to form VCOMP, which controls the power MOSFET current. The optimized internal compensation network minimizes the external component counts and simplifies the control loop design. |
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