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NSS35200CF8T1G Datasheet(PDF) 5 Page - ON Semiconductor

Part No. NSS35200CF8T1G
Description  High Current Surface Mount PNP Silicon Low VCE-SAT Switching Transistor for Load Management in Portable Applications
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Maker  ONSEMI [ON Semiconductor]
Homepage  http://www.onsemi.com
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NSS35200CF8T1G Datasheet(HTML) 5 Page - ON Semiconductor

   
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NSS35200CF8T1G
http://onsemi.com
5
PACKAGE DIMENSIONS
5
NOM
B
S
C
D
G
L
A
1
234
8
765
M
J
K
1
2
3
4
8
7
6
5
DIM
MIN
MAX
MIN
MAX
INCHES
MILLIMETERS
A
2.95
3.10
0.116
0.122
B
1.55
1.70
0.061
0.067
C
1.00
1.10
0.039
0.043
D
0.25
0.35
0.010
0.014
G
0.65 BSC
0.025 BSC
J
0.10
0.20
0.004
0.008
K
0.28
0.42
0.011
0.017
L
0.55 BSC
0.022 BSC
M
S
1.80
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MOLD GATE BURRS SHALL NOT EXCEED
0.13 MM PER SIDE.
4. LEADFRAME TO MOLDED BODY OFFSET
IN HORIZONTAL AND VERTICAL SHALL
NOT EXCEED 0.08 MM.
5. DIMENSIONS A AND B EXCLUSIVE OF
MOLD GATE BURRS.
6. NO MOLD FLASH ALLOWED ON THE TOP
AND BOTTOM LEAD SURFACE.
0.05 (0.002)
°
2.00
0.072
0.080
STYLE 4:
PIN 1. COLLECTOR
2. COLLECTOR
3. COLLECTOR
4. BASE
5. EMITTER
6. COLLECTOR
7. COLLECTOR
8. COLLECTOR
5
NOM
°
ChipFET
CASE 1206A−03
ISSUE PRELIMINARY
0.457
0.018
2.032
0.08
0.635
0.025
0.66
0.026
0.711
0.028
mm
inches
SCALE 20:1
0.178
0.007
2.032
0.08
1.727
0.068
0.66
0.026
0.711
0.028
mm
inches
SCALE 20:1
Style 4
Basic
0.457
0.018
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*


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