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LP6255QVF Datasheet(PDF) 9 Page - Lowpower Semiconductor inc |
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LP6255QVF Datasheet(HTML) 9 Page - Lowpower Semiconductor inc |
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9 / 10 page  LP6255-02 Feb.-2014 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 9 of 10 Preliminary Datasheet LP6255 The LDR and HDR outputs are controlled with an adaptive dead-time methodology which ensures that both outputs are never enabled at the same time. When the controller commands LDR to be enabled, the adaptive dead-time logic first disables HDR and waits for HDR-LX voltage to drop. LDR is then enabled after a small delay (HDR Fall to LDR Rise Delay). Similarly, the HDR turn-on is delayed until the LDR voltage has discharged. HDR is then enabled after a small delay (LDR Fall to HDR Rise Delay). This technique ensures adequate dead-time for any size N-channel MOSFET or parallel MOSFET configurations especially when VIN is supplied by a higher external voltage source. Use caution when adding series gate resistors, as this may decrease the effective dead-time. Care should be exercised in selecting the N-channel MOSFET devices threshold voltage. During startup at low input voltages, the low-side N-channel MOSFET's gate plateau voltage should be sufficiently low to completely enhance the N-channel MOSFET device. If the low-side MOSFET drive voltage is lower than the low-side MOSFET gate plateau voltage during startup, the regulator may not start properly and it may operate at the maximum duty cycle in a high power dissipation state. Cycle-by-Cycle Current Limit The LP6255 features a peak cycle-by-cycle current limit function. If the VIN to CS voltage exceeds the 100mV cycle-by-cycle current limit threshold, the current limit comparator immediately terminates the LDR output. For the case where the inductor current overshoots the desired limit, such as inductor saturation, the current limit comparator blocks LDR pulses until the current has decayed below the current limit threshold. Peak inductor current in current limit can be calculated as follows: S PEAK R mV I 100 Thermal Protection Internal thermal shutdown circuitry is provided to protect the controller in the event the maximum junction temperature is exceeded. When activated, typically at 150℃, the controller is forced into a low-power shutdown mode, disabling the output drivers, disconnection switch and the VIN regulator. This feature is designed to prevent overheating and destroying the device. |
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