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KS8995MA Datasheet(PDF) 45 Page - Micrel Semiconductor |
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KS8995MA Datasheet(HTML) 45 Page - Micrel Semiconductor |
45 / 73 page May 2005 45 M9999-051305 KS8995MA Micrel, Inc. Address Name Description Mode Default 5 Transmit Sniff 1, All the packets transmitted on the port will be marked R/W 0 as “monitored packets” and forwarded to the designated “sniffer port.” 0, no transmit monitoring. 4-0 Port VLAN Membership Define the port’s “Port VLAN membership.” Bit 4 stands R/W 0x1f for port 5, bit 3 for port 4...bit 0 for port 1. The port can only communicate within the membership. A ‘1’ includes a port in the membership, a ‘0’ excludes a port from membership. Register 18 (0x12): Port 1 Control 2 Register 34 (0x22): Port 2 Control 2 Register 50 (0x32): Port 3 Control 2 Register 66 (0x42): Port 4 Control 2 Register 82 (0x52): Port 5 Control 2 Address Name Description Mode Default 7 Reserved Reserved. 0x0 6 Ingress VLAN Filtering. 1, the switch will discard packets whose VID port R/W 0 membership in VLAN table bit[20:16] does not include the ingress port. 0, no ingress VLAN filtering. 5 Discard Non-PVID Packets. 1, the switch will discard packets whose VID does not R/W 0 match ingress port default VID. 0, no packets will be discarded. 4 Force Flow Control 1, will always enable Rx and Tx flow control on the port, R/W 0 regardless of AN result. For port 4 only, 0, the flow control is enabled based on AN result. there is a special Note: Setting a port for both half-duplex and forced configuration pin flow control is an illegal configuration. For half-duplex to set the default, enable back pressure. Pin PCOL strap option. Pull-down (0): No Force flow control. Pull-up (1): Force flow control. Note: PCOL has internal pull-down. 3 Back Pressure Enable 1, enable port’s half-duplex back pressure. R/W Pin PMRXD2 strap 0, disable port’s half-duplex back pressure. option. Pull-down (0): disable back pressure. Pull-up (1): enable back pressure. Note: PMRXD2 has internal pull-down. 2 Transmit Enable 1, enable packet transmission on the port. R/W 1 0, disable packet transmission on the port. 1 Receive Enable 1, enable packet reception on the port. R/W 1 0, disable packet reception on the port. 0 Learning Disable 1, disable switch address learning capability. R/W 0 0, enable switch address learning. Note: Bits 2-0 are used for spanning tree support. See “Spanning Tree Support” section. |
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