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MM74HC20 Datasheet(PDF) 2 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part No. MM74HC20
Description  Dual 4-Input NAND Gate
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Maker  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
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MM74HC20 Datasheet(HTML) 2 Page - National Semiconductor (TI)

   
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Absolute Maximum Ratings (Notes12)
If MilitaryAerospace specified devices are required
please contact the National Semiconductor Sales
OfficeDistributors for availability and specifications
Supply Voltage (VCC)
b
05 to a70V
DC Input Voltage (VIN)
b
15 to VCCa15V
DC Output Voltage (VOUT)
b
05 to VCCa05V
Clamp Diode Current (IIK IOK)
g
20 mA
DC Output Current per pin (IOUT)
g
25 mA
DC VCC or GND Current per pin (ICC)
g
50 mA
Storage Temperature Range (TSTG)
b
65 Cto a150 C
Power Dissipation (PD)
(Note 3)
600 mW
SO Package only
500 mW
Lead Temp (TL) (Soldering 10 seconds)
260 C
Operating Conditions
Min
Max
Units
Supply Voltage VCC
V
DC Input or Output Voltage
VCC
V
VIN VOUT
Operating Temp Range (TA)
MMHC
b
a
C
MMHC
b
a
C
Input Rise or Fall Times
VCCe
V
tr tf
ns
VCCe
V
ns
VCCe
V
ns
DC Electrical Characteristics (Note 4)
TAe25 C
74HC
54HC
Symbol
Parameter
Conditions
VCC
TAeb40 to 85 CTAeb55 to 125 C
Units
Typ
Guaranteed Limits
VIH
Minimum High Level
V
V
Input Voltage
V
V
V
V
VIL
Maximum Low Level
V
V
Input Voltage
V
V
V
V
VOH
Minimum High Level
VINeVIH or VIL
Output Voltage
lIOUTls mA
V
V
V
V
V
V
VINeVIH or VIL
lIOUTls
mA
V
V
lIOUTls
mA
V
V
VOL
Maximum Low Level
VINeVIH
Output Voltage
lIOUTls mA
V
V
V
V
V
V
VINeVIH
lIOUTls
mA
V
V
lIOUTls
mA
V
V
IIN
Maximum Input
VINeVCC or GND
V
g
g
g
m
A
Current
ICC
Maximum Quiescent
VINeVCC or GND
V
m
A
Supply Current
IOUTe mA
Note 1
Absolute Maximum Ratings are those values beyond which damage to the device may occur
Note 2
Unless otherwise specified all voltages are referenced to ground
Note 3
Power Dissipation temperature derating
plastic ‘‘N’’ package b12 mW C from 65 Cto85 C ceramic ‘‘J’’ package b12 mW C from 100 Cto125 C
Note 4
For a power supply of 5V g10% the worst case output voltages (VOH and VOL) occur for HC at 45V Thus the 45V values should be used when
designing with this supply Worst case VIH and VIL occur at VCCe55V and 45V respectively (The VIH value at 55V is 385V) The worst case leakage current (IIN
ICC and IOZ) occur for CMOS at the higher voltage and so the 60V values should be used
VIL limits are currently tested at 20% of VCC The above VIL specification (30% of VCC) will be implemented no later than Q1 CY’89
2


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