© 2010 Fairchild Semiconductor Corporation

www.fairchildsemi.com

FAN2510 Rev. 1.1.0

10

Thermal Characteristics

The FAN2510 can supply 100 mA at the specified output

voltage with an operating die (junction) temperature of

up to 125°C. Once the power dissipation and thermal

resistance is known, the maximum junction temperature

of the device can be calculated. While the power dissipa-

tion is calculated from known electrical parameters, the

thermal resistance is a result of the thermal characteris-

tics of the compact SOT23-5 surface-mount package

and the surrounding PC Board copper to which it is

mounted.

The power dissipation is equal to the product of the

input-tooutput voltage differential and the output current

plus the ground current multiplied by the input voltage,

or:

provided in the Electrical Characteristics section.

The relationship describing the thermal behavior of the

package is:

rounding PC board layout and can be empirically

mum PCB footprint is at least 235°C/W. This can be

improved by providing a heat sink of surrounding copper

ground on the PCB. Depending on the size of the copper

180°C/W for one square inch to nearly 130°C/W for four

square inches. The addition of backside copper with

through-holes, stiffeners, and other enhancements can

reduce this value. The heat contributed by the dissipa-

tion of other devices located nearby must be included in

design considerations.

Once the limiting parameters in these two relationships

have been determined, the design can be modified to

ensure that the device remains within specified operating

conditions. If overload conditions are not considered, it is

possible for the device to enter a thermal cycling loop, in

which the circuit enters a shutdown condition, cools, re-

enables, and then again overheats and shuts down

repeatedly due to an unmanaged fault condition.

–

+

=

()

–

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Operational of Adjustable Version

The adjustable version of the FAN2500 includes an input

pin ADJ which allows the user to select an output voltage

to the onboard error amplifier which adjusts the output

erence voltage of 1.32 V (typ). The equation is:

The total value of the resistor chain should not exceed

250 kΩ total to keep the error amplifier biased during no-

need to allow for the magnitude and variation of the

variations. Note that the low-leakage FET input to the

CMOS Error Amplifier induces no bias current error to

the calculation.

General PCB Layout Considerations

To achieve the full performance of the device, careful cir-

cuit layout and grounding technique must be observed.

Establishing a small local ground, to which the GND pin

and the output and bypass capacitors are connected, is

recommended The input capacitor should be grounded

to the main ground plane. The quiet local ground is

routed back to the main ground plane using feed-through

vias. In general, the high-frequency compensation com-

ponents (input, bypass, and output capacitors) should be

located as close to the device as possible. The proximity

of the output capacitor is especially important to achieve

optimal noise compensation from the onboard error

amplifier, especially during high load conditions. A large

copper area in the local ground provides the heat sinking

discussed above when high power dissipation signifi-

cantly increases the temperature of the device. Compo-

nent-side copper provides significantly better thermal

performance for this surface-mount device, compared to

that obtained when using only copper planes on the

underside.