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ECJ-2VC1H471J Datasheet(PDF) 8 Page - International Rectifier |
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ECJ-2VC1H471J Datasheet(HTML) 8 Page - International Rectifier |
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8 / 30 page  www.irf.com - 8 - 5.1 IRS2573D State and Timing Diagram VCC < UVLO- (VCC Fault or Power Down) UVLO Mode Full-Bridge Off (CT=0V) Buck Off (ICOMP, PCOMP, TOFF=0V) IGN Timer Off (TIGN=0V) CLK Off (TCLK=0V) IQCC 150A Fault and Good Counters Reset Fault Latch Reset GENERAL Mode Full-Bridge Oscillating @ fBRIDGE Buck Enabled IGN 'LOW' CLK and Fault Counters Enabled VSENSE OVP Enabled ISENSE Over-current Limitation Enabled Constant Power Control Enabled VCC > UVLO+ and VSENSE > VOV and RST < VRST- Power Turned On FAULT Mode Fault Latch Set Full-Bridge Off (CT=0V) Buck Off IGN Timer Off (TIGN=0V) CLK Off (TCLK=0V) IQCC 350A VCC = 15.6V All Counters Reset VCC < UVLO- (Power Off) or RST > VRST+ (Fault Reset) VSENSE < VOV(1/7.5) for 197sec (short circuit or does not warm up) or VSENSE < VOV(1/7.5) for 16384 Events IGN Mode IGN (21s 'HIGH'/64s 'LOW') Ignition Counter Enabled Buck and Full-Bridge Enabled CLK and Fault Counters Enabled Good Counter Reset VSENSE OVP Enabled VSENSE < VOV(2/5) VSENSE > VOV(2/5) VSENSE > VOV(2/5) for 787sec (open circuit) Reset Good Counter Good Counter = 2730sec (No faults detected) BUCK OFF Mode Buck Off Full-Bridge Oscillating Fault Counters Enabled Reset Fault and Good Counters VSENSE < VOV(1/7.5) VOV(2/5) < VSENSE < VOV and PCOMP > 0.2V and ICOMP > 0.5V VSENSE > VOV or PCOMP < 0.2V or ICOMP < 0.2V VSENSE < VOV(2/5) and PCOMP > 0.2V and ICOMP > 0.5V Figure 5.2: IRS2573D state and timing diagram 5.2 Under-voltage Lockout (UVLO) Mode The under-voltage lockout mode (UVLO) is defined as the state the IC is in when VCC is below the turn-on threshold of the IC. The IC is designed to maintain an ultra-low supply current during UVLO mode of 150uA, and to guarantee the IC is fully functional before |
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