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CSD86356Q5DT Datasheet(PDF) 3 Page - Texas Instruments |
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CSD86356Q5DT Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 26 page  3 CSD86356Q5D www.ti.com SLPS665 – MARCH 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated is not implied. Exposure to absolute- maximum-rated conditions for extended periods may affect device reliability. (2) Pulse duration = 50 µS. Duty cycle = 0.01. 5 Specifications 5.1 Absolute Maximum Ratings TA = 25°C (unless otherwise noted) (1) MIN MAX UNIT Voltage VIN to PGND –0.8 25 V VSW to PGND 25 VSW to PGND (10 ns) 27 TG to TGR –8 10 BG to PGND –8 10 Pulsed current rating, IDM(2) 120 A Power dissipation, PD 12 W Avalanche energy, EAS Sync FET, ID = 88 A, L = 0.1 mH 387 mJ Control FET, ID = 45 A, L = 0.1 mH 101 TJ and TSTG Operating junction and storage temperature –55 150 °C (1) Operating at high VIN can create excessive AC voltage overshoots on the switch node (VSW) during MOSFET switching transients. For reliable operation, the switch node (VSW) to ground voltage must remain at or below the Absolute Maximum Ratings. 5.2 Recommended Operating Conditions TA = 25°C (unless otherwise noted) MIN MAX UNIT VGS Gate drive voltage 4.5 8 V VIN Input supply voltage(1) 22 V ƒSW Switching frequency CBST = 0.1 µF (min) 1500 kHz Operating current 40 A TJ Operating temperature 125 °C TSTG Storage temperature 125 °C (1) RθJC is determined with the device mounted on a 1-in 2 (6.45-cm2), 2-oz (0.071-mm) thick Cu pad on a 1.5-in × 1.5-in (3.81-cm × 3.81-cm), 0.06-in (1.52-mm) thick FR4 board. RθJC is specified by design while RθJA is determined by the user’s board design. (2) Device mounted on FR4 material with 1-in2 (6.45-cm2) Cu. 5.3 Thermal Information TA = 25°C (unless otherwise noted) THERMAL METRIC MIN MAX UNIT RθJA Junction-to-ambient thermal resistance (min Cu)(1) 125 °C/W RθJA Junction-to-ambient thermal resistance (max Cu)(1) (2) 50 °C/W RθJC Junction-to-case thermal resistance (top of package)(1) 12 °C/W RθJC Junction-to-case thermal resistance (PGND pin) (1) 1.8 °C/W (1) Measurement made with six 10-μF (TDK C3216X5R1C106KT or equivalent) ceramic capacitors placed across VIN to PGND pins and using a high-current 5-V driver IC. 5.4 Power Block Performance TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT PLOSS Power loss(1) VIN = 12 V, VGS = 5 V, VOUT = 1.3 V, IOUT = 25 A, ƒSW = 500 kHz, LOUT = 0.3 μH, TJ = 25°C 2.8 W IQVIN VIN quiescent current (1) TG to TGR = 0 V, BG to PGND = 0 V 10 µA |
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