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AD8028 Datasheet(PDF) 6 Page - Analog Devices

Part # AD8028
Description  Low Distortion, High Speed Rail-to-Rail Input/Output Amplifiers
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD8028 Datasheet(HTML) 6 Page - Analog Devices

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AD8027/AD8028
Rev. B | Page 6 of 24
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
Rating
Supply Voltage
12.6 V
Power Dissipation
See Figure 3
Common-Mode Input Voltage
±VS ± 0.5 V
Differential Input Voltage
±1.8 V
Storage Temperature
–65°C to +125°C
Operating Temperature Range
–40°C to +125°C
Lead Temperature Range
(Soldering 10 sec)
300°C
Junction Temperature
150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress rat-
ing only; functional operation of the device at these or any
other conditions above those indicated in the operational sec-
tion of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Maximum Power Dissipation
The maximum safe power dissipation in the AD8027/AD8028
package is limited by the associated rise in junction temperature
(TJ) on the die. The plastic encapsulating the die will locally
reach the junction temperature. At approximately 150°C, which
is the glass transition temperature, the plastic will change its
properties. Even temporarily exceeding this temperature limit
may change the stresses that the package exerts on the die,
permanently shifting the parametric performance of the
AD8027/AD8028. Exceeding a junction temperature of 175°C
for an extended period of time can result in changes in the
silicon devices, potentially causing failure.
The still-air thermal properties of the package and PCB (θJA),
ambient temperature (TA), and the total power dissipated in the
package (PD) determine the junction temperature of the die.
The junction temperature can be calculated as
(
)
JA
D
A
J
θ
P
T
T
×
+
=
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (VS) times the
quiescent current (IS). Assuming the load (RL) is referenced to
midsupply, then the total drive power is VS/2 × IOUT, some of
which is dissipated in the package and some in the load (VOUT ×
IOUT). The difference between the total drive power and the load
power is the drive power dissipated in the package.
(
)
Power
Load
Power
Drive
Total
Power
Quiescent
PD
+
=
()
L
OUT
L
OUT
S
S
S
D
R
V
R
V
V
I
V
P
2
2


×
+
×
=
RMS output voltages should be considered. If RL is referenced
to VS–, as in single-supply operation, then the total drive power
is VS × IOUT.
If the rms signal levels are indeterminate, then consider the
worst case, when VOUT = VS/4 for RL to midsupply
() ()
L
S
S
S
D
R
V
I
V
P
2
4
/
+
×
=
In single-supply operation with RL referenced to VS–, worst case
is VOUT = VS/2.
Airflow will increase heat dissipation, effectively reducing θJA.
Also, more metal directly in contact with the package leads
from metal traces, through holes, ground, and power planes will
reduce the θJA. Care must be taken to minimize parasitic capaci-
tances at the input leads of high speed op amps as discussed in
the board layout section.
Figure 3 shows the maximum safe power dissipation in the
package versus the ambient temperature for the SOIC-8
(125°C/W), SOT-23-6 (170°C/W), and MSOP-10 (130°C/W)
packages on a JEDEC standard 4-layer board.
OUTPUT SHORT CIRCUIT
Shorting the output to ground or drawing excessive current
from the AD8027/AD8028 will likely cause catastrophic failure.
AMBIENT TEMPERATURE (°C)
–55
–35
–15
5
25
45
65
85
105
125
0
0.5
1.0
1.5
2.0
SOT-23-6
SOIC-8
MSOP-10
03327-A-002
Figure 3. Maximum Power Dissipation


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