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S29CD016G0JQAI001 Datasheet(PDF) 11 Page - SPANSION

Part # S29CD016G0JQAI001
Description  16 Megabit (512 K x 32-Bit) CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory
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Manufacturer  SPANSION [SPANSION]
Direct Link  http://www.spansion.com
Logo SPANSION - SPANSION

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November 5, 2004 S29CD016_00_A4
S29CD016G
11
Ad va nc e
In forma t i o n
Pin Configuration
A0–A18
=
19-bit address bus for 16 Mb device. A9 supports 12
V autoselect inputs.
DQ0–DQ31
=
32-bit data inputs/outputs/float
CE#
=
Chip Enable Input. This signal is asynchronous
relative to CLK for the burst mode.
OE#
=
Output Enable Input. This signal is asynchronous
relative to CLK for the burst mode.
WE#
=
Write enable. This signal is asynchronous relative to
CLK for the burst mode.
VSS
=
Device ground
NC
=
Pin not connected internally
RY/BY#
=
Ready/Busy output and open drain. When RY/BY# =
VIH, the device is ready to accept read operations
and commands. When RY/BY# = VOL, the device is
either executing an embedded algorithm or the
device is executing a hardware reset operation (A
pull-up resistor is required.).
CLK
=
Clock Input that can be tied to the system or
microprocessor clock and provides the fundamental
timing and internal operating frequency.
ADV#
=
Load Burst Address input. Indicates that the valid
address is present on the address inputs.
IND/WAIT#
=
End of burst indicator for finite bursts only. IND/
WAIT# is low when the last word in the burst
sequence is at the data outputs. Otherwise the IND/
WAIT# is high when CE# is low.
WP#
=
Write Protect input. When WP# = VOL, the two
outermost bootblock sector in the 75% bank are
write protected regardless of other sector protection
configurations.
ACC
=
Acceleration input. When taken to 12 V, program and
erase operations are accelerated. When not used for
acceleration, ACC = VSS or VCC.
VIO (VCCQ)
=
Output Buffer Power Supply (1.65 V to 2.75 V, 3.6 V
tolerant)
VCC
=
Chip Power Supply (2.5 V to 2.75 V)
RESET#
=
Hardware reset input
MCH
=
Must Connect High (to VCC)


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