Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.COM

X  

AM29SL160C Datasheet(PDF) 26 Page - Advanced Micro Devices

Part # AM29SL160C
Description  16 Megabit CMOS 1.8 Volt-only Super Low Voltage Flash Memory
Download  52 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM29SL160C Datasheet(HTML) 26 Page - Advanced Micro Devices

Back Button AM29SL160C Datasheet HTML 22Page - Advanced Micro Devices AM29SL160C Datasheet HTML 23Page - Advanced Micro Devices AM29SL160C Datasheet HTML 24Page - Advanced Micro Devices AM29SL160C Datasheet HTML 25Page - Advanced Micro Devices AM29SL160C Datasheet HTML 26Page - Advanced Micro Devices AM29SL160C Datasheet HTML 27Page - Advanced Micro Devices AM29SL160C Datasheet HTML 28Page - Advanced Micro Devices AM29SL160C Datasheet HTML 29Page - Advanced Micro Devices AM29SL160C Datasheet HTML 30Page - Advanced Micro Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 26 / 52 page
background image
26
Am29SL160C
November 1, 2004
Chip Erase Command Sequence
Chip erase is a six bus cycle operation. The chip erase
command sequence is initiated by writing two unlock
cycles, followed by a set-up command. Two additional
unlock write cycles are then followed by the chip erase
command, which in turn invokes the Embedded Erase
algorithm. The device does not require the system to
preprogram prior to erase. The Embedded Erase algo-
rithm automatically preprograms and verifies the entire
memory for an all zero data pattern prior to electrical
erase. The system is not required to provide any con-
trols or timings during these operations. Table 12, on
page 28 shows the address and data requirements for
the chip erase command sequence.
Any commands written to the chip during the
Embedded Erase algorithm are ignored. Note that a
hardware reset during the chip erase operation imme-
diately terminates the operation. The Chip Erase
command sequence should be reinitiated once the
device returns to reading array data, to ensure data
integrity.
The system can determine the status of the erase oper-
ation by using DQ7, DQ6, DQ2, or RY/BY#. See “Write
Operation Status” on page 29 for information on these
status bits. When the Embedded Erase algorithm is
complete, the device returns to reading array data and
addresses are no longer latched.
Figure 4, on page 27 illustrates the algorithm for the
erase operation. See “Erase/Program Operations” on
page 40 for parameters, and Figure 18, on page 42 for
timing diagrams.
Sector Erase Command Sequence
Sector erase is a six bus cycle operation. The sector
erase command sequence is initiated by writing two
unlock cycles, followed by a set-up command. Two
additional unlock write cycles are then followed by the
address of the sector to be erased, and the sector
erase command. Table 12, on page 28 shows the
address and data requirements for the sector erase
command sequence.
The device does not require the system to preprogram
the memory prior to erase. The Embedded Erase algo-
rithm automatically programs and verifies the sector for
an all zero data pattern prior to electrical erase. The
system is not required to provide any controls or
timings during these operations.
After the command sequence is written, a sector erase
time-out of 50 µs begins. During the time-out period,
additional sector addresses and sector erase com-
mands may be written. Loading the sector erase buffer
may be done in any sequence, and the number of
sectors may be from one sector to all sectors. The time
between these additional cycles must be less than 50
µs, otherwise the last address and command might not
be accepted, and erasure may begin. It is recom-
mended that processor interrupts be disabled during
this time to ensure all commands are accepted. The
interrupts are re-enabled after the last Sector Erase
command is written. If the time between additional
sector erase commands can be assumed to be less
than 50 µs, the system need not monitor DQ3. Any
command other than Sector Erase or Erase
Suspend during the time-out period resets the
device to reading array data. The system must
rewrite the command sequence and any additional
sector addresses and commands.
The system can monitor DQ3 to determine if the sector
erase timer has timed out. (See “DQ3: Sector Erase
Timer” on page 31.) The time-out begins from the rising
edge of the final WE# pulse in the command sequence.
Once the sector erase operation begins, only the Erase
Suspend command is valid. All other commands are
ignored. Note that a hardware reset during the sector
erase operation immediately terminates the operation.
The Sector Erase command sequence should be rein-
itiated once the device returns to reading array data, to
ensure data integrity.
When the Embedded Erase algorithm is complete, the
device returns to reading array data and addresses are
no longer latched. The system can determine the
status of the erase operation by using DQ7, DQ6, DQ2,
or RY/BY#. (Refer to “Write Operation Status” on
page 29 for information on these status bits.)
Figure 4, on page 27 illustrates the algorithm for the
erase operation. Refer to the “Erase/Program Opera-
tions” on page 40 for parameters, and to Figure 18, on
page 42 for timing diagrams.
Erase Suspend/Erase Resume Commands
The Erase Suspend command allows the system to
interrupt a sector erase operation and then read data
from, or program data to, any sector not selected for
erasure. This command is valid only during the sector
erase operation, including the 50 µs time-out period
during the sector erase command sequence. The
Erase Suspend command is ignored if written during
the chip erase operation or Embedded Program algo-
rithm. Writing the Erase Suspend command during the
Sector Erase time-out immediately terminates the
time-out period and suspends the erase operation.
Addresses are “don’t-cares” when writing the Erase
Suspend command.
When the Erase Suspend command is written during a
sector erase operation, the device requires a maximum
of 20 µs to suspend the erase operation. However,
when the Erase Suspend command is written during
the sector erase time-out, the device immediately ter-
minates the time-out period and suspends the erase
operation.


Similar Part No. - AM29SL160C

ManufacturerPart #DatasheetDescription
logo
Advanced Micro Devices
AM29SL160C AMD-AM29SL160C Datasheet
1Mb / 52P
   16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory
AM29SL160CB-100EC AMD-AM29SL160CB-100EC Datasheet
1Mb / 52P
   16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory
AM29SL160CB-100ED AMD-AM29SL160CB-100ED Datasheet
1Mb / 52P
   16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory
AM29SL160CB-100EF AMD-AM29SL160CB-100EF Datasheet
1Mb / 52P
   16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory
AM29SL160CB-100EI AMD-AM29SL160CB-100EI Datasheet
1Mb / 52P
   16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory
More results

Similar Description - AM29SL160C

ManufacturerPart #DatasheetDescription
logo
Advanced Micro Devices
AM29DS163D AMD-AM29DS163D Datasheet
1Mb / 50P
   16 Megabit CMOS 1.8 Volt-only, Simultaneous Operation Flash Memory
logo
ATMEL Corporation
AT49SV163D ATMEL-AT49SV163D Datasheet
463Kb / 30P
   16-megabit 1M x 16) 1.8-volt Only Flash Memory
AT49SV802A ATMEL-AT49SV802A Datasheet
417Kb / 31P
   8-megabit 1.8-volt Only Flash Memory
AT49SV322D ATMEL-AT49SV322D Datasheet
519Kb / 32P
   32-megabit (2M x 16) 1.8-volt Only Flash Memory
logo
Advanced Micro Devices
AM29SL160C AMD-AM29SL160C_07 Datasheet
1Mb / 52P
   16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory
logo
SPANSION
S29AL016D SPANSION-S29AL016D Datasheet
1Mb / 58P
   16 MEGABIT CMOS 3.0 VOLT ONLY BOOT SECTOR FLASH MEMORY
S29AL032D SPANSION-S29AL032D Datasheet
1Mb / 69P
   32 Megabit CMOS 3.0 Volt-only Flash Memory
AM29SL400D SPANSION-AM29SL400D Datasheet
776Kb / 41P
   4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory
logo
Eon Silicon Solution In...
EN39SL160AHL EON-EN39SL160AHL Datasheet
524Kb / 50P
   16 Megabit (1024K x 16-bit) Flash Memory With 4Kbytes Uniform Sector, CMOS 1.8 Volt-only
logo
Advanced Micro Devices
AM29SL800D AMD-AM29SL800D_07 Datasheet
1Mb / 46P
   8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com