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74LVC1G175 Datasheet(PDF) 2 Page - NXP Semiconductors

Part No. 74LVC1G175
Description  Single D-type flip-flop with reset; positive-edge trigger
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74LVC1G175 Datasheet(HTML) 2 Page - NXP Semiconductors

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9397 750 13762
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 — 18 October 2004
2 of 17
Philips Semiconductors
74LVC1G175
Single D-type flip-flop with reset; positive-edge trigger
3.
Quick reference data
[1]
CPD is used to determine the dynamic power dissipation (PD in µW).
PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = number of inputs switching;
Σ(C
L × VCC
2
× f
o) = sum of the outputs.
[2]
The condition is VI = GND to VCC.
4.
Ordering information
5.
Functional diagram
Table 1:
Quick reference data
GND = 0 V; Tamb =25 °C; tr =tf ≤ 2.5 ns.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tPHL, tPLH propagation delay
CP to Q
CL = 50 pF; VCC = 3.3 V
1.0
3.1
5.7
ns
propagation delay
MR to Q
CL = 50 pF; VCC = 3.3 V
1.0
2.5
5.8
ns
fmax
maximum clock
frequency
CL = 50 pF; VCC = 3.3 V
175
300
-
MHz
CI
input capacitance
-
2.5
-
pF
CPD
power dissipation
capacitance
VCC = 3.3 V
[1] [2] -14
-
pF
Table 2:
Ordering information
Type number
Package
Temperature range
Name
Description
Version
74LVC1G175GW
−40 °C to +125 °C
SC-88
plastic surface mounted package; 6 leads
SOT363
74LVC1G175GV
−40 °C to +125 °C
SC-74
plastic surface mounted package; 6 leads
SOT457
74LVC1G175GM
−40 °C to +125 °C
XSON6
plastic extremely thin small outline package; no
leads; 6 terminals; body 1
× 1.45 × 0.5 mm
SOT886
Fig 1.
Logic symbol.
Fig 2.
IEC logic symbol.
001aaa468
FF
MR
Q
4
3
6
1
CP
D
001aaa469
1
3
C1
1D
6
R
4


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