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XRT75L00 Datasheet(PDF) 1 Page - Exar Corporation

Part No. XRT75L00
Description  E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
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Maker  EXAR [Exar Corporation]
Homepage  http://www.exar.com
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XRT75L00 Datasheet(HTML) 1 Page - Exar Corporation

 
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Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com
XRT75L00
E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
FEBRUARY 2004
REV. 1.0.2
GENERAL DESCRIPTION
The XRT75L00 is a single-channel fully integrated
Line Interface Unit (LIU) with Jitter Attenuator for E3/
DS3/STS-1
applications.
It
incorporates
an
independent
Receiver,
Transmitter
and
Jitter
Attenuator in a single 52 pin TQFP package.
The XRT75L00 can be configured to operate in either
E3 (34.368 MHz), DS3 (44.736 MHz) or STS-1 (51.84
MHz) modes. The transmitter can be turned off (tri-
stated) for redundancy support and for conserving
power.
The XRT75L00’s differential receiver provides high
noise interference margin and is able to receive the
data over 1000 feet of cable or with up to 12 dB of
cable attenuation.
The XRT75L00 incorporates an advanced crystal-
less jitter attenuator that can be selected either in the
transmit
or
receive
path.
The
jitter
attenuator
performance meets the ETSI TBR-24 and Bellcore
GR-499 specifications.
The XRT75L00 provides both Serial Microprocessor
Interface as well as Hardware mode for programming
and control.
The XRT75L00 supports local, remote and digital
loop-backs. The XRT75L00 also contains an on-
board Pseudo Random Binary Sequence (PRBS)
generator and detector with the ability to insert and
detect single bit error.
FEATURES
RECEIVER:
On chip Clock and Data Recovery circuit for high
input jitter tolerance.
Meets
E3/DS3/STS-1
Jitter
Tolerance
Requirements.
Detects and Clears LOS as per G.775.
Meets Bellcore GR-499 CORE Jitter Transfer
Requirements.
Receiver Monitor mode handles up to 20 dB flat
loss with 6 dB cable attenuation.
Compliant with jitter transfer template outlined in
ITU G.751, G.752, G.755 and GR-499-CORE,1995
standards.
Meets ETSI TBR 24 Jitter Transfer Requirements.
On chip B3ZS/HDB3 encoder and decoder that can
be either enabled or disabled.
On-chip clock synthesizer provides the appropriate
rate clock from a single 12.288 MHz Clock.
Provides low jitter output clock.
TRANSMITTER:
Compliant with Bellcore GR-499, GR-253 and ANSI
T1.102 Specification for transmit pulse
Tri-state Transmit output capability for redundancy
applications
Transmitter can be turned on or off.
JITTER ATTENUATOR:
On chip advanced crystal-less Jitter Attenuator.
Jitter Attenuator can be selected in Receive or
Transmit paths.
16 or 32 bits selectable FIFO size.
Meets the Jitter and Wander specifications
described in T1.105.03b,ETSI TBR-24, Bellcore
GR-253 and GR-499 standards.
Jitter Attenuator can be disabled.
CONTROL AND DIAGNOSTICS:
5 wire Serial Microprocessor Interface for control
and configuration.
Supports optional internal Transmit Driver
Monitoring.
PRBS error counter register to accumulate errors.
Hardware Mode for control and configuration.
Supports Local, Remote and Digital Loop-backs.
Single 3.3 V ± 5% power supply.
5 V Tolerant I/O.
Available in 52 pin TQFP.
-40°C to 85°C Industrial Temperature Range.
APPLICATIONS
E3/DS3 Access Equipment.
DSLAMs.
Digital Cross Connect Systems.
CSU/DSU Equipment.
Routers.
Fiber Optic Terminals.


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