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UCC21222DR Datasheet(PDF) 2 Page - Texas Instruments

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Part # UCC21222DR
Description  4-A, 6-A, 3.0-kVRMS Isolated Dual-Channel Gate Driver with Dead Time
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

UCC21222DR Datasheet(HTML) 2 Page - Texas Instruments

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UCC21222
SLUSCX6 – FEBRUARY 2018
www.ti.com
Product Folder Links: UCC21222
Submit Documentation Feedback
Copyright © 2018, Texas Instruments Incorporated
Table of Contents
1
Features .................................................................. 1
2
Applications ........................................................... 1
3
Description ............................................................. 1
4
Revision History..................................................... 2
5
Pin Configuration and Functions ......................... 3
6
Specifications......................................................... 4
6.1
Absolute Maximum Ratings ...................................... 4
6.2
ESD Ratings.............................................................. 4
6.3
Recommended Operating Conditions ....................... 4
6.4
Thermal Information .................................................. 5
6.5
Power Ratings........................................................... 5
6.6
Insulation Specifications............................................ 6
6.7
Safety-Related Certifications..................................... 7
6.8
Safety-Limiting Values .............................................. 7
6.9
Electrical Characteristics........................................... 8
6.10
Switching Characteristics ........................................ 9
6.11
Thermal Derating Curves ...................................... 10
6.12
Typical Characteristics .......................................... 11
7
Parameter Measurement Information ................ 15
7.1
Minimum Pulses...................................................... 15
7.2
Propagation Delay and Pulse Width Distortion....... 15
7.3
Rising and Falling Time ......................................... 15
7.4
Input and Disable Response Time.......................... 16
7.5
Programmable Dead Time ...................................... 16
7.6
Power-up UVLO Delay to OUTPUT........................ 17
7.7
CMTI Testing........................................................... 18
8
Detailed Description ............................................ 19
8.1
Overview ................................................................. 19
8.2
Functional Block Diagram ....................................... 19
8.3
Feature Description................................................. 20
8.4
Device Functional Modes........................................ 23
9
Application and Implementation ........................ 25
9.1
Application Information............................................ 25
9.2
Typical Application .................................................. 25
10
Power Supply Recommendations ..................... 35
11
Layout................................................................... 36
11.1
Layout Guidelines ................................................. 36
11.2
Layout Example .................................................... 37
12
Device and Documentation Support ................. 39
12.1
Documentation Support ....................................... 39
12.2
Related Links ........................................................ 39
12.3
Receiving Notification of Documentation Updates 39
12.4
Community Resources.......................................... 39
12.5
Trademarks ........................................................... 39
12.6
Electrostatic Discharge Caution ............................ 39
12.7
Glossary ................................................................ 39
13
Mechanical, Packaging, and Orderable
Information ........................................................... 39
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
DATE
REVISION
NOTES
February 2018
*
Advance Information release.


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