Electronic Components Datasheet Search |
|
CY14B116N-Z45XIT Datasheet(PDF) 7 Page - Cypress Semiconductor |
|
CY14B116N-Z45XIT Datasheet(HTML) 7 Page - Cypress Semiconductor |
7 / 37 page CY14B116L/CY14B116N/CY14B116S CY14E116L/CY14E116N/CY14E116S Document Number: 001-67793 Rev. *N Page 7 of 37 Pin Definitions Pin Name I/O Type Description A0 – A20 Input Address inputs. Used to select one of the 2,097,152 bytes of the nvSRAM for the ×8 configuration. A0 – A19 Address inputs. Used to select one of the 1,048,576 words of the nvSRAM for the ×16 configuration. A0 – A18 Address inputs. Used to select one of the 524,288 words of the nvSRAM for the ×32 configuration. DQ0 – DQ7 Input/Output Bidirectional data I/O lines for the ×8 configuration. Used as input or output lines depending on operation. DQ0 – DQ15 Bidirectional data I/O lines for the ×16 configuration. Used as input or output lines depending on operation. DQ0 – DQ31 Bidirectional data I/O lines for ×32 configuration. Used as input or output lines depending on operation. WE Input Write Enable input, Active LOW. When selected LOW, data on the I/O pins is written to the specific address location. CE Input Chip Enable input in TSOP II package, Active LOW. When LOW, selects the chip. When HIGH, deselects the chip. CE1, CE2 Chip Enable input in FBGA package. The device is selected and a memory access begins on the falling edge of CE1 (while CE2 is HIGH) or the rising edge of CE2 (while CE1 is LOW). OE Input Output Enable, Active LOW. The Active LOW OE input enables the data output buffers during read cycles. Deasserting OE HIGH causes the I/O pins to tristate. BLE/BA[8] Input Byte Enable, Active LOW. When selected LOW, enables DQ7–DQ0. BHE/BB[8] Input Byte Enable, Active LOW. When selected LOW, enables DQ15–DQ8. BC[8] Input Byte Enable, Active LOW. When selected LOW, enables DQ23–DQ16. BD[8] Input Byte Enable, Active LOW. When selected LOW, enables DQ31–DQ24. ZZ[9] Input Sleep Mode Enable. When the ZZ pin is pulled LOW, the device enters a low-power Sleep mode and consumes the lowest power. Since this input is logically AND’ed with CE, ZZ must be HIGH for normal operation. VCC Power Supply Power supply inputs to the device. VSS Power Supply Ground for the device. Must be connected to ground of the system. HSB Input/Output Hardware STORE Busy (HSB).When LOW, this output indicates that a Hardware STORE is in progress. When pulled LOW external to the chip it initiates a nonvolatile STORE operation. After each Hardware and Software STORE operation, HSB is driven HIGH for a short time (tHHHD) with standard output high current and then a weak internal pull-up resistor keeps this pin HIGH (external pull-up resistor connection optional). VCAP Power Supply AutoStore capacitor. Supplies power to the nvSRAM during power loss to store data from SRAM to nonvolatile elements. NC NC No Connect. Die pads are not connected to the package pin. Notes 8. BLE, BHE are applicable for ×16 configuration and BA, BB, BC, BD are applicable for ×32 configuration only. 9. Sleep mode feature is offered in 165-ball FBGA package only. |
Similar Part No. - CY14B116N-Z45XIT |
|
Similar Description - CY14B116N-Z45XIT |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |