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CY7C65210A-24LTXI Datasheet(PDF) 4 Page - Cypress Semiconductor |
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CY7C65210A-24LTXI Datasheet(HTML) 4 Page - Cypress Semiconductor |
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4 / 19 page  Document Number: 001-97082 Rev. *E Page 4 of 19 CY7C65210, CY7C65217 CY7C65210A, CY7C65217A CY7C65210 and CY7C65210A Pin Description Pin[2] Type Name Default Description 1GPIO GPIO_6 Tristate GPIO 2GPIO GPIO_7 Tristate GPIO 3Power VSSD – Digital Ground 4GPIO GPIO_8 Tristate GPIO 5GPIO GPIO_9 Tristate GPIO 6GPIO GPIO_10 Tristate GPIO 7 GPIO GPIO_11 POWER# GPIO (CY7C65210) GPIO GPIO_11 Tristate GPIO (CY7C65210A) 8 Output SUSPEND – On CY7C65210, this pin indicates that the device in Suspend mode. Can be configured as active LOW/HIGH using the configuration utility. GPIO GPIO_12 Tristate On CY7C65210A, this pin serves as GPIO. 9 Input WAKEUP – On CY7C65210, this pin is configured to wake up the device from Suspend mode. Can be configured as active LOW/HIGH using the configuration utility. GPIO GPIO_13 Tristate On CY7C65210A, this pin serves as GPIO. 10 USBIO USBDP – USB Data Signal Plus, integrates termination resistor and a 1.5-k pull-up resistor 11 USBIO USBDM – USB Data Signal Minus, integrates termination resistor 12 Power VCCD – This pin should be decoupled to ground using a 1-µF capacitor or by connecting a 1.8-V supply 13 Power VSSD – Digital Ground 14 nXRES nXRES – Chip reset, active low. Can be left unconnected or have a pull-up resistor connected if not used 15 Power VBUS – VBUS Supply, 3.15 V to 5.25 V 16 Power VSSD – Digital Ground 17 Power VSSA – Analog Ground 18 Input Debug I/O – Used for debug purpose. Should be left floating. 19 GPIO GPIO_1 Input Can be used as wakeup source to wakeup device from Suspend mode. 20 GPIO GPIO_2 Tristate GPIO 21 SCB/GPIO SCB_1/GPIO_3 SCL I2C SCL 22 SCB/GPIO SCB_2/GPIO_4 SDA I2C SDA 23 GPIO GPIO_5 Tristate GPIO 24 Power VDDD – Supply to the device core and Interface, 1.71 V to 5.5 V CY7C65210- 24-pin QFN Top View 1 2 3 4 5 6 17 16 15 14 13 18 GPIO_6 GPIO_7 VSSD GPIO_8 GPIO_9 GPIO_10 Debug I/O VSSA VSSD VBUS nXRES VSSD CY7C65210A- 24-pin QFN Top View 1 2 3 4 5 6 17 16 15 14 13 18 GPIO_6 GPIO_7 VSSD GPIO_8 GPIO_9 GPIO_10 Debug I/O VSSA VSSD VBUS nXRES VSSD Note 2. Any pin acting as an Input pin should not be left unconnected. |
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