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FSCQ1565RP Datasheet(PDF) 15 Page - Fairchild Semiconductor

Part No. FSCQ1565RP
Description  Green Mode Fairchild Power Switch (FPS) for Quasi-Resonant Switching Converter
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Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
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FSCQ1565RP Datasheet(HTML) 15 Page - Fairchild Semiconductor

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FSCQ1565RP
15
Once FSCQ1565RP enters into extended quasi-resonant
operation, the first sync signal is ignored. After the first sync
signal is applied, the sync threshold levels are changed from
4.6V and 2.6V to 3V and 1.8V, respectively, and the
MOSFET turn-on time is synchronized to the second sync
signal. The FSCQ1565RP goes back to its normal quasi-
resonant operation when the switching frequency reaches
45kHz as the load increases.
Figure 7. Extended quasi-resonant operation waveforms
3. Feedback Control : FSCQ1565RP employs current mode
control, as shown in Figure 11. An opto-coupler (such as the
H11A817A) and shunt regulator (such as the KA431) are
typically
used
to
implement
the
feedback
network.
Comparing the feedback voltage with the voltage across the
Rsense resistor plus an offset voltage makes it possible to
control the switching duty cycle. When the reference pin
voltage of the KA431 exceeds the internal reference voltage
of 2.5V, the H11A817A LED current increases, thus pulling
down the feedback voltage and reducing the duty cycle. This
event typically happens when the input voltage is increased
or the output load is decreased.
3.1 Pulse-by-pulse current limit: Because current mode
control is employed, the peak current through the Sense FET
is limited by the inverting input of PWM comparator (Vfb*)
as shown in Figure 11. The feedback current (IFB) and
internal resistors are designed so that the maximum cathode
voltage of diode D2 is about 2.8V, which occurs when all IFB
flows through the internal resistors. Since D1 is blocked
when the feedback voltage (Vfb) exceeds 2.8V, the
maximum voltage of the cathode of D2 is clamped at this
voltage, thus clamping Vfb*. Therefore, the peak value of
the current through the Sense FET is limited.
3.2 Leading edge blanking (LEB) : At the instant the
internal Sense FET is turned on, there usually exists a high
current spike through the Sense FET, caused by external
resonant capacitor across the MOSFET and secondary-side
rectifier reverse recovery. Excessive voltage across the
Rsense resistor would lead to incorrect feedback operation in
the current mode PWM control. To counter this effect, the
FSCQ1565RP employs a leading edge blanking (LEB)
circuit. This circuit inhibits the PWM comparator for a short
time (TLEB) after the Sense FET is turned on.
Figure 8. Pulse width modulation (PWM) circuit
4. Protection Circuit : The FSCQ1565RP has several self
protective functions such as over load protection (OLP),
abnormal over current protection (AOCP), over voltage
protection (OVP) and thermal shutdown (TSD). OLP and
OVP are auto-restart mode protection, while TSD and
AOCP are latch mode protection. Because these protection
circuits are fully integrated into the IC without external
components, the reliability can be improved without
increasing cost.
-Auto-restart mode protection: Once the fault condition is
detected, switching is terminated and the Sense FET remains
off. This causes Vcc to fall. When Vcc falls down to the
under voltage lockout (UVLO) stop voltage of 9V, the
protection is reset and FSCQ1565RP consumes only startup
current (25uA). Then, Vcc capacitor is charged up, since the
current supplied through the startup resistor is larger than the
current that FPS consumes. When Vcc reaches the start
voltage of 15V, FSCQ1565RP resumes its normal operation.
If the fault condition is not removed, the SenseFET remains
off and Vcc drops to stop voltage again. In this manner, the
auto-restart can alternately enable and disable the switching
of the power Sense FET until the fault condition is
eliminated (see Figure 12).
-Latch
mode
protection:
Once
protection
triggers,
switching is terminated and the Sense FET remains off until
the AC power line is un-plugged. Then, Vcc continues
charging and discharging between 9V and 15V. The latch is
reset only when Vcc is discharged to 6V by un-plugging the
Ac power line.
Vsync
Vds
MOSFET Gate
2V
RO
4.6V
2.6V
3V
1.8V
ON
ON
4
OSC
Vcc
Vref
I
delay
I
FB
V
SD
R
2.5R
Gate
driver
OLP
D1
D2
+
V
fb*
-
Vfb
KA431
C
B
Vo
H11A817A
R
sense
SenseFET


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