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CY7C1382KV33-167AXC Datasheet(PDF) 7 Page - Cypress Semiconductor |
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CY7C1382KV33-167AXC Datasheet(HTML) 7 Page - Cypress Semiconductor |
7 / 33 page CY7C1380KV33 CY7C1382KV33 Document Number: 001-97878 Rev. *E Page 7 of 33 TDO JTAG serial output Synchronous Serial data-out to the JTAG circuit. Delivers data on the negative edge of TCK. If the JTAG feature is not being utilized, this pin must be disconnected. This pin is not available on TQFP packages. TDI JTAG serial input Synchronous Serial data-in to the JTAG circuit. Sampled on the rising edge of TCK. If the JTAG feature is not being utilized, this pin can be disconnected or connected to VDD. This pin is not available on TQFP packages. TMS JTAG serial input Synchronous Serial data-in to the JTAG circuit. Sampled on the rising edge of TCK. If the JTAG feature is not being utilized, this pin can be disconnected or connected to VDD. This pin is not available on TQFP packages. TCK JTAG- Clock Clock input to the JTAG circuitry. If the JTAG feature is not being utilized, this pin must be connected to VSS. This pin is not available on TQFP packages. NC – No Connects. 36M, 72M, 144M, 288M, 576M, and 1G are address expansion pins and are not internally connected to the die. Pin Definitions (continued) Name I/O Description |
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