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CY7C1381KV33 Datasheet(PDF) 28 Page - Cypress Semiconductor

Part No. CY7C1381KV33
Description  18-Mbit (512K × 36/1M × 18) Flow-Through SRAM (With ECC)
Download  34 Pages
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Maker  CYPRESS [Cypress Semiconductor]
Homepage  http://www.cypress.com
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CY7C1381KV33 Datasheet(HTML) 28 Page - Cypress Semiconductor

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CY7C1381KV33/CY7C1381KVE33
CY7C1383KV33/CY7C1383KVE33
Document Number: 001-97888 Rev. *F
Page 28 of 34
Figure 8. ZZ Mode Timing [28, 29]
Timing Diagrams (continued)
t
ZZ
I
SUPPLY
CLK
ZZ
t
ZZREC
A LL INPUTS
(except ZZ)
DON’T CARE
I
DDZZ
t
ZZI
t
RZZI
Outputs (Q)
High-Z
DESELECT or READ Only
Notes
28. Device must be deselected when entering ZZ mode. See Truth Table on page 11 for all possible signal conditions to deselect the device.
29. DQs are in high Z when exiting ZZ sleep mode.


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