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CY7C1061GN30-10BVJXI Datasheet(PDF) 8 Page - Cypress Semiconductor |
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CY7C1061GN30-10BVJXI Datasheet(HTML) 8 Page - Cypress Semiconductor |
8 / 21 page CY7C1061GN/CY7C10612GN Document Number: 001-93680 Rev. *C Page 8 of 21 Data Retention Characteristics Over the Operating Range Parameter Description Conditions Min Max Unit VDR VCC for data retention – 1 – V ICCDR Data retention current VCC = 1.2 V, CE1 > VCC – 0.2 V, CE2 < 0.2 V, VIN > VCC – 0.2 V or VIN < 0.2 V –30 mA tCDR [9] Chip deselect to data retention time –0 – ns tR[10] Operation recovery time VCC > 2.2 V 10 – ns VCC < 2.2 V 15 – Data Retention Waveform Figure 8. Data Retention Waveform [11] VCC (min) VCC (min) tCDR VDR > 1 V Data Retention Mode tR CE VCC Notes 9. Tested initially and after any design or process changes that may affect these parameters. 10. Full device operation requires linear VCC ramp from VDR to VCC(min.) > 100 s or stable at VCC(min.) > 100 s. 11. CE is the logical combination of CE1 and CE2. When CE1 is LOW and CE2 is HIGH, CE is LOW; when CE1 is HIGH or CE2 is LOW, CE is HIGH. |
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