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CY7C10612GN30-10ZSXI Datasheet(PDF) 6 Page - Cypress Semiconductor |
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CY7C10612GN30-10ZSXI Datasheet(HTML) 6 Page - Cypress Semiconductor |
6 / 21 page CY7C1061GN/CY7C10612GN Document Number: 001-93680 Rev. *C Page 6 of 21 Maximum Ratings Exceeding maximum ratings may impair the useful life of the device. These user guidelines are not tested. Storage Temperature ............................... –65 C to +150 C Ambient Temperature with Power Applied .................................. –55 C to +125 C Supply Voltage on VCC relative to GND [4] .................. –0.5 V to VCC + 0.5 V DC Voltage Applied to Outputs in High Z State [4] ................................ –0.5 V to VCC + 0.5 V DC Input Voltage [4] ............................ –0.5 V to VCC + 0.5 V Current into Outputs (LOW) ........................................ 20 mA Static Discharge Voltage (MIL-STD-883, Method 3015) .................................. >2001 V Latch Up Current .................................................... >200 mA Operating Range Range Ambient Temperature VCC Industrial –40 C to +85 C 1.65 V to 2.2 V, 2.2 V to 3.6 V DC Electrical Characteristics Over the Operating Range Parameter Description Test Conditions 10 ns/15 ns Unit Min Typ [5] Max VOH Output HIGH voltage 1.65 V to 2.2 V VCC = Min, IOH = –0.1 mA 1.4 – – V 2.2 V to 2.7 V VCC = Min, IOH = –0.1 mA 2.0 – – 2.7 V to 3.0 V VCC = Min, IOH = –4.0 mA 2.2 – – 3.0 V to 3.6 V VCC = Min, IOH = –4.0 mA 2.4 – – VOL Output LOW voltage 1.65 V to 2.2 V VCC = Min, IOL = 0.1 mA – – 0.2 V 2.2 V to 2.7 V VCC = Min, IOL = 2 mA – – 0.4 2.7 V to 3.6 V VCC = Min, IOL = 8 mA – – 0.4 VIH Input HIGH voltage [4] 1.65 V to 2.2 V – 1.4 – VCC + 0.2 V 2.2 V to 2.7 V – 2.0 – VCC + 0.3 2.7 V to 3.6 V – 2.0 – VCC + 0.3 VIL Input LOW voltage [4] 1.65 V to 2.2 V – –0.2 – 0.4 V 2.2 V to 2.7 V – –0.3 – 0.6 2.7 V to 3.6 V – –0.3 – 0.8 IIX Input leakage current GND < VI < VCC –1 – +1 A IOZ Output leakage current GND < VOUT < VCC, Output disabled –1 – +1 A ICC VCC operating supply current VCC = Max, IOUT = 0 mA, CMOS levels f = 100 MHz – 90 110 mA f = 66.7 MHz – 70 80 ISB1 Automatic CE power down current – TTL inputs[6] Max VCC, CE1 > VIH, CE2 < VIL, VIN > VIH or VIN < VIL, f = fMAX –– 40 mA ISB2 Automatic CE power down current – CMOS inputs[6] Max VCC, CE1 > VCC – 0.3 V, CE2 < 0.3 V, VIN > VCC – 0.3 V or VIN < 0.3 V, f = 0 –20 30 mA Notes 4. VIL(min) = –2.0 V and VIH(max) = VCC + 2 V for pulse durations of less than 20 ns. 5. Typical values are included only for reference and are not guaranteed or tested. Typical values are measured at VCC = 1.8 V (for a VCC range of 1.65 V–2.2 V), VCC = 3 V (for a VCC range of 2.2 V–3.6 V) at TA = 25 °C. 6. For all dual chip enable devices, CE is the logical combination of CE1 and CE2. When CE1 is LOW and CE2 is HIGH, CE is LOW; when CE1 is HIGH or CE2 is LOW, CE is HIGH. |
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