CY7C1061GN30

Document Number: 001-93680 Rev. *A

Page 8 of 18

AC Switching Characteristics

Over the Operating Range

Parameter [10]

Description

-10

Unit

Min

Max

Read Cycle

100

–

s

Read cycle time

10

–

ns

Address to data valid

–

10

ns

Data hold from address change

3

–

ns

–

10

ns

OE LOW to data valid

–

5

ns

OE LOW to low Z [12]

0–

ns

OE HIGH to high Z [12]

–5

ns

3–

ns

–5

ns

0–

ns

–10

ns

Byte enable to data valid

–

5

ns

Byte enable to low Z

0

–

ns

Byte disable to high Z

–

6

ns

Write Cycle [14, 15]

Write cycle time

10

–

ns

7

–

ns

Address setup to write end

7

–

ns

Address hold from write end

0–

ns

Address setup to write start

0

–

ns

WE pulse width

7–

ns

Data setup to write end

5

–

ns

Data hold from write end

0

–

ns

WE HIGH to low Z [12,13.]

3–

ns

WE LOW to high Z [12,13.]

–5

ns

Byte Enable to End of Write

7–

ns

Notes

10. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5 V, and input pulse levels of 0 to 3.0 V. Test conditions for the read cycle use

output loading shown in part (a) of Figure 3 on page 6, unless specified otherwise.

high impedance

13. These parameters are guaranteed by design and are not tested.

LOW to initiate a write, and the transition of any of these signals can terminate. The input data setup and hold timing should be referenced to the edge of the signal

that terminates the write.