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CY7C1061GN Datasheet(PDF) 1 Page - Cypress Semiconductor

Part # CY7C1061GN
Description  16-Mbit (1M words 횞 16 bit) Static RAM
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7C1061GN Datasheet(HTML) 1 Page - Cypress Semiconductor

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CY7C1061GN/CY7C10612GN
16-Mbit (1M words × 16 bit) Static RAM
Cypress Semiconductor Corporation
198 Champion Court
San Jose
, CA 95134-1709
408-943-2600
Document Number: 001-93680 Rev. *C
Revised September 29, 2016
16-Mbit (1M words × 16 bit) Static RAM
Features
High speed
tAA = 10 ns/15 ns
Low active power
ICC = 90 mA at 100 MHz
Low CMOS standby current
ISB2 = 20 mA (typ)
Operating voltages of 2.2 V to 3.6 V
1.0 V data retention
Automatic power down when deselected
TTL compatible inputs and outputs
Easy memory expansion with CE1 and CE2 features
Available in Pb-free 48-pin TSOP I, 54-pin TSOP II, and 48-ball
VFBGA packages
Offered in dual Chip Enable options
Functional Description
The CY7C1061GN/CY7C10612GN is a high performance
CMOS Static RAM organized as 1,048,576 words by 16 bits.
To write to the device, take Chip Enables (CE1 LOW and CE2
HIGH) and Write Enable (WE) input LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is
written into the location specified on the address pins (A0 through
A19). If Byte High Enable (BHE) is LOW, then data from I/O pins
(I/O8 through I/O15) is written into the location specified on the
address pins (A0 through A19).
To read from the device, take Chip Enables (CE1 LOW and CE2
HIGH) and Output Enable (OE) LOW while forcing the Write
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data
from the memory location specified by the address pins appears
on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then data from
memory appears on I/O8 to I/O15. See Truth Table on page 13
for a complete description of Read and Write modes.
The input or output pins (I/O0 through I/O15) are placed in a high
impedance state when the device is deselected (CE1 HIGH/CE2
LOW), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a write operation (CE1
LOW, CE2 HIGH, and WE LOW).
A1
A2
A3
A4
A5
A6
A7
A8
COLUMN
DECODER
INPUT BUFFER
1M x 16
ARRAY
A0
I/O0 – I/O7
OE
I/O8 – I/O15
CE1
WE
BLE
BHE
A9
CE2
Logic Block Diagram


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