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S79FL512S Datasheet(PDF) 1 Page - Cypress Semiconductor |
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S79FL512S Datasheet(HTML) 1 Page - Cypress Semiconductor |
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1 / 111 page  S79FL256S/S79FL512S 256 Mbit (32 MB)/512 Mbit (64 MB), 3 V, Dual-Quad SPI Flash Cypress Semiconductor Corporation • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 002-00518 Rev. *D Revised November 09, 2017 Features Density – 256 Mbit (32 Mbytes) – 512 Mbit (64 Mbytes) Serial Peripheral Interface (SPI) – SPI Clock polarity and phase modes 0 and 3 – Double Data Rate (DDR) option – Extended Addressing: 24- or 32-bit address options READ Commands – Dual-Quad SPI Quad Read: 104 MHz clock rate (104 MB/ s) – Dual-Quad SPI Quad DDR Read: 80 MHz clock rate (160 MB/s) – Normal, Fast, Quad, Quad DDR – AutoBoot - power up or reset and execute a Normal or Quad read command automatically at a preselected address – Common Flash Interface (CFI) data for configuration information. Programming (3 Mbytes/s) – 512-byte or 1024-byte Page Programming buffer options – Quad-Input Page Programming (QPP) for slow clock systems – Automatic ECC - internal hardware Error Correction Code generation with single bit error correction Erase (1 Mbyte/s) – Hybrid sector size option – physical set of thirty two 8-kbyte sectors at top or bottom of address space with all remaining sectors of 128 kbytes – Uniform sector option – always erase 512-kbyte blocks for software compatibility with higher density and future devices. Cycling Endurance – 100,000 Program-Erase Cycles on any sector, minimum Data Retention – 20 Year Data Retention, minimum Security features – Separate One Time Program (OTP) array of 2048 bytes – Block Protection: – Status Register bits to control protection against program or erase of a contiguous range of sectors. – Hardware and software control options – Advanced Sector Protection (ASP) – Individual sector protection controlled by boot code or password Cypress® 65 nm MirrorBit® Technology with Eclipse™ Architecture Core Supply Voltage: 2.7V to 3.6V Temperature Range: – Industrial (-40°C to +85°C) – Industrial Plus (-40°C to +105°C) – Automotive, AEC-Q100 Grade 3 (-40°C to +85°C) – Automotive, AEC-Q100 Grade 2 (-40°C to +105°C) Packages (all Pb-free) – 16-lead SOIC (300 mil) Software Features – Program Suspend and Resume – Erase Suspend and Resume – Status Register provides status of embedded erase or programming operation – Common Flash Interface (CFI) Compliant — allows host system to identify the flash device and determine its capabilities – User-configurable Configuration Register Hardware Features – Hardware Reset input (RESET#) - resets device to standby state |
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