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S6E1A12C0AGV20000 Datasheet(PDF) 3 Page - Cypress Semiconductor

Part # S6E1A12C0AGV20000
Description  32-bit ARM짰 Cortex짰-M0FM0 Microcontroller
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

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Document Number: 002-05091 Rev.*B
Page 3 of 96
S6E1A Series
Watch Counter
The Watch Counter wakes up the microcontroller from the low
power consumption mode. The clock source can be selected
from the main clock, the sub clock, the built-in high-speed CR
clock or the built-in low-speed CR clock.
Interval timer: up to 64 s (sub clock: 32.768 kHz)
External Interrupt Controller Unit
Up to 8 external interrupt input pins
Non-maskable interrupt (NMI) input pin: 1
Watchdog Timer (2 channels)
The watchdog timer generates an interrupt or a reset when the
counter reaches a time-out value.
This series consists of two different watchdogs, "hardware"
watchdog and "software" watchdog.
The "hardware" watchdog timer is clocked by the built-in
low-speed CR oscillator. Therefore, the "hardware" watchdog
is active in any low-power consumption modes except RTC
mode and STOP mode.
Clock and Reset
Clocks
A clock can be selected from five clock sources (two external
oscillators, two built-in CR oscillator, and main PLL).
Main clock
: 4 MHz to 40MHz
Sub clock
: 32.768 kHz
Built-in high-speed CR clock
: 4 MHz
Built-in low-speed CR clock
: 100 kHz
Main PLL clock
Resets
Reset request from the INITX pin
Power on reset
Software reset
Watchdog timer reset
Low-voltage detection reset
Clock supervisor reset
Clock Supervisor (CSV)
The Clock Supervisor monitors the failure of external clocks
with a clock generated by a built-in CR oscillator.
If an external clock failure (clock stop) is detected, a reset is
asserted.
If an external frequency anomaly is detected, an interrupt or
a reset is asserted.
Low-voltage Detector (LVD)
This series monitors the voltage on the VCC pin with a 2-stage
mechanism. When the voltage falls below a designated voltage,
the Low-voltage Detector generates an interrupt or a reset.
LVD1: error reporting via an interrupt
LVD2: auto-reset operation
Low Power Consumption Mode
This series has four low power consumption modes.
SLEEP
TIMER
RTC
STOP
Peripheral Clock Gating
The system can reduce the current consumption of the total
system with gating the operation clocks of peripheral functions
not used.
Debug
Serial Wire Debug Port (SW-DP)
Micro Trace Buffer (MTB)
Unique ID
A 41-bit unique value of the device has been set.
Power Supply
Wide voltage range: VCC = 2.7 V to 5.5 V


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