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MB90387 Datasheet(PDF) 48 Page - Cypress Semiconductor |
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MB90387 Datasheet(HTML) 48 Page - Cypress Semiconductor |
48 / 82 page Document Number: 002-07765 Rev. *A Page 47 of 81 MB90387/387S/F387/F387S MB90V495G 12.11 UART Outline UART is a general-purpose serial data communication interface for synchronous and asynchronous communication using external devices. ■ Provided with bi-directional communication function for both clock-synchronous and clock-asynchronous modes. ■ Provided with master/slave communication function (multi-processor mode). (Only master side is available.) ■ Interrupt request is generated upon completion of reception, completion of transmission and detection of reception error. ■ Ready for expanded intelligent service, EI2OS. Note: Start/stop bit is not added upon clock-synchronous transmission. Data only is transmitted. : Disallowed 1: “+1” is an address/data selection bit used for communication control (bit 11 of SCR1 register: A/D). 2: Only 1 bit is detected as a stop bit on data reception. Table 12-3. UART Functions Description Data buffer Full-duplex double buffer Transmission mode Clock synchronous (No start/stop bit, no parity bit) Clock asynchronous (start-stop synchronous) Baud rate Built-in special-purpose baud-rate generator. Setting is selectable among 8 values. Input of external values is allowed. Use of clock from external timer (16-bit reload timer 0) is allowed. Data length 7 bits (only asynchronous normal mode) 8 bits Signaling system Non Return to Zero (NRZ) system Reception error detection Framing error Overrun error Parity error (not detectable in operation mode 1 (multi-processor mode)) Interrupt request Receive interrupt (reception completed, reception error detected) Transmission interrupt (transmission completed) Ready for expanded intelligent I/O service (EI2OS) in both transmission and reception Master/slave communication function (asynchronous, multi-processor mode) Communication between 1 (master) and n (slaves) are available (usable as master only). Table 12-4. UART Operation Modes Operation Mode Data Length Synchronization Stop Bit Length With Parity Without Parity 0 Asynchronous mode (normal mode) 7-bit or 8-bit Asynchronous 1- bit or 2-bit *2 1 Multi processor mode 8+1*1 Asynchronous 2 Synchronous mode 8 Synchronous No |
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