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AHA4013B-050PJC Datasheet(PDF) 10 Page - List of Unclassifed Manufacturers |
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AHA4013B-050PJC Datasheet(HTML) 10 Page - List of Unclassifed Manufacturers |
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10 / 28 page  Page 6 of 24 PS4013B-0600 Advanced Hardware Architectures, Inc. 2.6.1 INITIALIZATION REGISTERS BYTE 1, ERASURE MULTIPLIER: [7:0] Multiplier value that must be programmed as shown in Appendix A. The table shows a value to be programmed corresponding to the block length selected. BYTE 2, ERROR THRESHOLD: [4:0] The threshold for determining uncorrectability of a data block, and the number of check bytes allocated for correction only purposes. When not using erasures, set to the same value as BYTE 3, CHECK BYTES. Minimum value of 0x02 sets the Threshold to 2 and 0x14 sets to the maximum, 20. [6:5] Reserved. Set to 0. [7] Reserved. Must be set to 1. BYTE 3, CHECK BYTES: [4:0] Number of check bytes in RS code, R. Minimum setting of 0x02 indicates two check bytes for R = 2 and 0x14 indicates the maximum of 20. [6:5] Reserved. Set to 0. [7] Reserved. Must be set to 1. BYTE 4, MESSAGE BYTES: [7:0] Number of message bytes in code, K. Minimum setting of 0x01 indicates 1 byte, setting to 0xFD indicates the maximum 253 message bytes. BYTE 5, BLOCK LENGTH: [7:0] Number of bytes in block, N. Setting to 0x03 indicates 3 bytes, setting to 0xFF indicates 255 bytes. BYTE 6, CONTROL BYTE: [0] RESERVED Reserved. Set to 0. [1] NOPAR Parity Symbol Control 0 Check bytes are output following the message bytes. 1 Check bytes are not output following the message bytes. Correction will be done regardless depending upon the bit 4, RAW, setting. [2] CRCTS Correction Control 0 Outputs correction vectors; to obtain corrected data, externally XOR the correction vector with the corresponding message or check byte. 1 Outputs corrected data [3] FOR Forward Order Control 0 Outputs the block in reverse order 1 Outputs the block in forward order [4] RAW Raw Data 0 Outputs corrections or corrected data per the CRCTS bit 1 Outputs uncorrected, raw input data or 0’s depending upon the CRCTS bit setting (See table below). NOPAR bit and CHECK BYTE register settings are ignored. [5] ERC Erasure Rejection Control. This bit is only used by the device when the Erasures exceed the ERROR THRESHOLD or R settings. This bit is ignored when the Erasures are less than or equal to ERROR THRESHOLD or R. 0 If Erasures are greater than the ERROR THRESHOLD or R then erasures are discarded and full correction is performed. The block is flagged uncorrectable and the output CRTN will be high during the last output byte of the block. 1 If Erasures are greater than ERROR THRESHOLD or R then erasures are discarded and full correction is performed. The output CRTN will be high only when the block is uncorrectable. [7:6] Reserved, Set to 0. RAW CRCTS Output 0 0 Correction vectors 0 1 Corrected data 10 Zero 1 1 Uncorrected raw input data |
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