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TMS626162 Datasheet(PDF) 6 Page - Texas Instruments

Part No. TMS626162
Description  524288 BY 16-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
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TMS626162 Datasheet(HTML) 6 Page - Texas Instruments

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TMS626162
524288 BY 16-BIT BY 2-BANK
SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY
SMOS683E – FEBRUARY 1995 – REVISED APRIL 1997
6
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
burst sequence
All data for the ’626162 is written or read in a burst fashion, that is, a single starting address is entered into the
device and then the ’626162 internally accesses a sequence of locations based on that starting address. After
the first access some of the subsequent accesses can be at preceding as well as succeeding column addresses,
depending on the starting address entered. This sequence can be programmed to follow either a serial burst
or an interleave burst (see Table 4 through Table 6). The length of the burst can be programmed to be 1, 2, 4,
8, or full-page ( 256 ) accesses (see the section on setting the mode register, page 9). After a read burst is
complete (as determined by the programmed-burst length), the outputs are in the high-impedance state until
the next read access is initiated.
Table 4. 2-Bit Burst Sequences
INTERNAL COLUMN ADDRESS A0
DECIMAL
BINARY
START
2ND
START
2ND
Serial
0
1
0
1
Serial
1
0
1
0
Interleave
0
1
0
1
Interleave
1
0
1
0
Table 5. 4-Bit Burst Sequences
INTERNAL COLUMN ADDRESS A1 – A0
DECIMAL
BINARY
START
2ND
3RD
4TH
START
2ND
3RD
4TH
0
1
2
3
00
01
10
11
Serial
1
2
3
0
01
10
11
00
Serial
2
3
0
1
10
11
00
01
3
0
1
2
11
00
01
10
0
1
2
3
00
01
10
11
Interleave
1
0
3
2
01
00
11
10
Interleave
2
3
0
1
10
11
00
01
3
2
1
0
11
10
01
00


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