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ADC14155QML-SP Datasheet(PDF) 7 Page - Texas Instruments |
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ADC14155QML-SP Datasheet(HTML) 7 Page - Texas Instruments |
7 / 34 page V A AGND To Internal Circuitry I/O 7 ADC14155QML-SP www.ti.com SNAS378J – NOVEMBER 2008 – REVISED MARCH 2018 Product Folder Links: ADC14155QML-SP Submit Documentation Feedback Copyright © 2008–2018, Texas Instruments Incorporated (1) Pre and post irradiation limits are identical to those listed in the Electrical Characteristics tables. Radiation testing is performed per MIL- STD-883, Test Method 1019. (2) The inputs are protected as shown below. Input voltage magnitudes above VA or below GND will not damage this device, provided current is limited per Note 5. However, errors in the A/D conversion can occur if the input goes above 2.6 V or below GND as described in the Recommended Operating Conditions section. (3) To ensure accuracy, it is required that |VA – VD| ≤ 100 mV and separate bypass capacitors are used at each power supply pin. (4) With the test condition for VREF = 1 V (2-VP-P differential input), the 14-bit LSB is 122.1 µV. (5) When the input voltage at any pin exceeds the power supplies (that is, VIN < AGND, or VIN > VA), the current at that pin should be limited to ±5 mA. The ±50-mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of ±5 mA to 10. (6) Typical figures are at TA = 25°C and represent most likely parametric norms at the time of product characterization. The typical specifications are not ensured. (7) Integral Non Linearity is defined as the deviation of the analog value, expressed in LSBs, from the straight line that passes through positive and negative full-scale. (8) The input capacitance is the sum of the package/pin capacitance and the sample and hold circuit capacitance. (9) Optimum performance will be obtained by keeping the reference input in the 0.9-V to 1.1-V range. The LM4051CIM3-ADJ (SOT-23 package) is recommended for external reference applications. 6.5 ADC14155 Converter Electrical Characteristics DC Parameters (1) Unless otherwise specified, the following specifications apply: AGND = DGND = DRGND = 0 V, VA = VD = 3.3 V, VDR = 1.8 V, Internal VREF = 1 V, fCLK = 155 MHz, VCM = VRM, CL = 5 pF/pin, Differential Analog Input, Single-Ended Clock Mode, Offset Binary Format. Typical values are for TA = 25°C. (2) (3) (4) (5) PARAMETER TEST CONDITIONS NOTES TYP(6) MIN MAX UNITS SUB- GROUPS STATIC CONVERTER CHARACTERISTICS Resolution with no missing codes 14 Bits INL Integral non linearity See(7) 2.3 –5.0 5.0 LSB [1, 2, 3] DNL Differential non linearity ±0.5 –0.9 1.1 LSB [1, 2, 3] PGE Maximum positive gain error 0.1 –3.3 3.5 %FS [1, 2, 3] NGE Maximum negative gain error 0.3 –3.3 3.9 %FS [1, 2, 3] TC GE Gain error tempco –55°C ≤ TA ≤ +125°C 0.007 Δ%FS/°C VOFF Offset error (VIN+ = VIN−) –0.1 0.7 –0.9 %FS [1, 2, 3] TC VOFF Offset error tempco –55°C ≤ TA ≤ +125°C 0.0001 Δ%FS/°C Under range output code 0 0 0 [7, 8A, 8B] Over range output code 16383 16383 16383 [7, 8A, 8B] REFERENCE AND ANALOG INPUT CHARACTERISTICS VCM Common mode input voltage 1.5 V VRM Reference ladder midpoint output voltage Output load = 1 mA 1.5 V CIN VIN input capacitance (each pin to GND) VIN = 1.5 Vdc ± 0.5 V(CLK LOW) See(8) 9 pF VIN = 1.5 Vdc ± 0.5 V(CLK HIGH) See(8) 6 pF VREF Reference voltage See(9) 1.00 V Reference input resistance 9 kΩ |
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