CY7C371
7c371: Tuesday, May 26, 1992
Revision: August 9, 1995
2
7c3712
I/O27
I/O26
I/O25
I/O24
CLK1/I5
GND
I4
I3
I/O23
I/O22
I/O21
I/O5
I/O6
I/O7
I0
I1
GND
CLK0/I2
I/O8
I/O9
I/O10
I/O11
Pin Configurations
6 5
3
4
2
8
9
7
10
11
144
18
15
16
14
13
12
17
19 20
22
21
23 24
27
26
28
25
31
30
29
32
33
34
39
37
38
36
35
43 42
40
41
I/O27
I/O26
I/O25
I/O24
CLK1/I5
GND
I4
I3
I/O23
I/O22
I/O21
I/O5
I/O6
I/O7
I0
I1
GND
CLK0/I2
I/O8
I/O9
I/O10
I/O11
8
9
7
10
11
3
4
2
5
6
1
18 19 20
22
21
13 14 15
17
16
12
31
30
29
32
33
26
25
24
27
28
23
44 43 42
40
41
39 38 37
35
36
34
7c3713
PLCC/CLCC
Top View
TQFP
Top View
Logic Block
The number of logic blocks distinguishes the members of the
FLASH370 family. The CY7C371 includes two logic blocks. Each
logic block is constructed of a product term array, a product term
allocator, and 16 macrocells.
Product Term Array
The product term array in the FLASH370 logic block includes 36 in
puts from the PIM and outputs 86 product terms to the product
term allocator. The 36 inputs from the PIM are available in both
positive andnegativepolarity,makingtheoverallarraysize72x86.
This large array in each logic block allows for very complex func
tions to be implemented in a single pass through the device.
Product Term Allocator
The product term allocator is a dynamic, configurable resource
that shifts product terms to macrocells that require them. Any
number of product terms between 0 and 16 inclusive can be as
signed to any of the logic block macrocells (this is called product
term steering). Furthermore, product terms can be shared among
multiple macrocells. This means that product terms that are com
mon to more than one output can be implemented in a single prod
uct term. Product term steering and product term sharing help to
increase the effective density of the FLASH370 CPLDs. Note that
product term allocation is handled by software and is invisible to
the user.
I/O Macrocell
Each of the macrocells on the CY7C371 has a separate associated
I/O pin. The input to the macrocell is the sum of between 0 and 16
product terms from the product term allocator. The macrocell in
cludes a register that can be optionally bypassed. It also has polar
ity control, and two global clocks to trigger the register. The ma
crocell also features a separate feedback path to the PIM so that
the register can be buried if the I/O pin is used as an input.
Programmable Interconnect Matrix
The Programmable Interconnect Matrix (PIM) connects the two
logic blocks on the CY7C371 to the inputs and to each other. All
inputs (including feedbacks) travel through the PIM. There is no
speed penalty incurred by signals traversing the PIM.
Design Tools
Development software for the CY7C371 is available from Cy
press's Warp2, Warp2+, and Warp3 software packages. All of these
products are based on the IEEEstandard VHDL language. Cy
press also actively supports thirdparty design tools such as
ABELt, CUPLt, MINC, and LOG/iCt. Please contact your lo
cal Cypress representative for further information.
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines,
not tested.)
Storage Temperature
-65_C to +150_C
. . . . . . . . . . . . . . . . . . .
Ambient Temperature with
Power Applied
-55_C to +125_C
. . . . . . . . . . . . . . . . . . . . . . . .
Supply Voltage to Ground Potential
-0.5V to +7.0V
. . . . . . . . .
DC Voltage Applied to Outputs
in High Z State
-0.5V to +7.0V
. . . . . . . . . . . . . . . . . . . . . . . . . .
DC Input Voltage
-0.5V to +7.0V
. . . . . . . . . . . . . . . . . . . . . . . .
DC Program Voltage
12.5V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Current into Outputs (LOW)
16 mA
. . . . . . . . . . . . . . .
Static Discharge Voltage
>2001V
. . . . . . . . . . . . . . . . . . . . . . . .
(per MIL STD 883, Method 3015)
LatchUp Current
>200 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Range
Range
Ambient
Temperature
VCC
Commercial
0_C to +70_C
5V ± 5%
Military[1]
-55_C to +125_C
5V ± 10%
Industrial
-40_C to +85_C
5V ± 10%
Note:
1. TA is the instant on" case temperature.
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