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CY8C52LP Datasheet(PDF) 3 Page - Cypress Semiconductor |
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CY8C52LP Datasheet(HTML) 3 Page - Cypress Semiconductor |
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3 / 114 page  PSoC® 5LP: CY8C52LP Family Datasheet Document Number: 001-84933 Rev. *L Page 3 of 114 Contents 1. Architectural Overview ................................................. 4 2. Pinouts ........................................................................... 6 3. Pin Descriptions .......................................................... 11 4. CPU ............................................................................... 13 4.1 ARM Cortex-M3 CPU ...........................................13 4.2 Cache Controller ..................................................14 4.3 DMA and PHUB ...................................................14 4.4 Interrupt Controller ...............................................17 5. Memory ......................................................................... 19 5.1 Static RAM ...........................................................19 5.2 Flash Program Memory ........................................19 5.3 Flash Security .......................................................19 5.4 EEPROM ..............................................................19 5.5 Nonvolatile Latches (NVLs) ..................................20 5.6 External Memory Interface ...................................21 5.7 Memory Map ........................................................22 6. System Integration ...................................................... 23 6.1 Clocking System ...................................................23 6.2 Power System ......................................................26 6.3 Reset ....................................................................30 6.4 I/O System and Routing .......................................32 7. Digital Subsystem ....................................................... 39 7.1 Example Peripherals ............................................39 7.2 Universal Digital Block ..........................................41 7.3 UDB Array Description .........................................44 7.4 DSI Routing Interface Description ........................44 7.5 USB ......................................................................46 7.6 Timers, Counters, and PWMs ..............................46 7.7 I2C ........................................................................47 8. Analog Subsystem ...................................................... 49 8.1 Analog Routing .....................................................50 8.2 Successive Approximation ADC ...........................52 8.3 Comparators .........................................................52 8.4 LCD Direct Drive ..................................................53 8.5 CapSense .............................................................54 8.6 Temp Sensor ........................................................54 8.7 DAC ......................................................................54 9. Programming, Debug Interfaces, Resources ............ 55 9.1 JTAG Interface .....................................................56 9.2 SWD Interface ......................................................57 9.3 Debug Features ....................................................58 9.4 Trace Features .....................................................58 9.5 SWV and TRACEPORT Interfaces ......................58 9.6 Programming Features .........................................58 9.7 Device Security ....................................................58 9.8 CSP Package Bootloader .....................................59 10. Development Support ............................................... 59 10.1 Documentation ...................................................59 10.2 Online .................................................................59 10.3 Tools ...................................................................59 11. Electrical Specifications ........................................... 60 11.1 Absolute Maximum Ratings ................................60 11.2 Device Level Specifications ................................61 11.3 Power Regulators ...............................................64 11.4 Inputs and Outputs .............................................68 11.5 Analog Peripherals .............................................75 11.6 Digital Peripherals ..............................................89 11.7 Memory ..............................................................93 11.8 PSoC System Resources ...................................97 11.9 Clocking ............................................................100 12. Ordering Information ............................................... 104 12.1 Part Numbering Conventions ...........................105 13. Packaging ................................................................. 106 14. Acronyms ................................................................. 109 15. Reference Documents ............................................. 110 16. Document Conventions .......................................... 111 16.1 Units of Measure ..............................................111 Document History Page ................................................ 112 Sales, Solutions, and Legal Information ..................... 114 Worldwide Sales and Design Support...................... 114 Products ................................................................... 114 PSoC®Solutions ...................................................... 114 Cypress Developer Community................................ 114 Technical Support .................................................... 114 |
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