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CYPD2105-20FNXIT Datasheet(PDF) 1 Page - Cypress Semiconductor |
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CYPD2105-20FNXIT Datasheet(HTML) 1 Page - Cypress Semiconductor |
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1 / 33 page  EZ-PD™ CCG2 Datasheet USB Type-C Port Controller Cypress Semiconductor Corporation • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 001-93912 Rev. *L Revised August 2, 2016 USB Type-C Port Controller General Description EZ-PD™ CCG2 is a USB Type-C controller that complies with the latest USB Type-C and PD standards. EZ-PD CCG2 provides a complete USB Type-C and USB Power Delivery port control solution for passive cables, active cables, and powered accessories. It can also be used in many upstream and downstream facing port applications. EZ-PD CCG2 uses Cypress’s proprietary M0S8 technology with a 32-bit, 48-MHz ARM® Cortex®-M0 processor with 32-KB flash and integrates a complete Type-C Transceiver including the Type-C termination resistors RP, RD and RA. Applications ■ USB Type-C EMCA cables ■ USB Type-C powered accessories ■ USB Type-C upstream facing ports ■ USB Type-C downstream facing ports Features 32-bit MCU Subsystem ■ 48-MHz ARM Cortex-M0 CPU ■ 32-KB Flash ■ 4-KB SRAM ■ In-system reprogrammable Integrated Digital Blocks ■ Integrated timers and counters to meet response times required by the USB-PD protocol ■ Run-time reconfigurable serial communication block (SCB) with reconfigurable I2C, SPI, or UART functionality Clocks and Oscillators ■ Integrated oscillator eliminating the need for external clock Type-C Support ■ Integrated transceiver (baseband PHY) ■ Integrated UFP (RD), EMCA (RA) termination resistors, and current sources for DFP (RP) ■ Supports one USB Type-C port Low-Power Operation ■ 2.7-V to 5.5-V operation ■ Two independent VCONN rails with integrated isolation between the two ■ Independent supply voltage pin for GPIO that allows 1.71-V to 5.5-V signaling on the I/Os ■ Reset: 1.0 µA, Deep Sleep: 2.5 µA, Sleep: 2.0 mA System-Level ESD on CC and VCONN Pins ■ ± 8-kV Contact Discharge and ±15-kV Air Gap Discharge based on IEC61000-4-2 level 4C Packages ■ 1.63 mm × 2.03 mm, 20-ball wafer-level CSP (WLCSP) with 0.4-mm ball pitch ■ 2.5 mm × 3.5 mm × 0.6 mm 14-pin DFN ■ 4.0 mm × 4.0 mm, 0.55 mm 24-pin QFN ■ Supports industrial ( 40 °C to +85 °C) and extended industrial ( 40 °C to +105 °C) temperature ranges Logic Block Diagram Flash (32 KB) SRAM (4 KB) Serial Wire Debug CCG2: USB Type-C Cable Controller CORTEX-M0 48 MHz Integrated Digital Blocks I/O Subsystem MCU Subsystem CC5 GPIO6 Port 1 Timer, counter, pulse-width modulation block 2 Serial communication block configurable as UART, SPI, or I2C 3 Termination resistor denoting a UFP 4 Termination resistor denoting an EMCA 5 Configuration Channel 6 General-purpose input/output 7 Current Sources to indicate a DFP Profiles and Configurations Baseband MAC Baseband PHY SCB2 (I2C, SPI, UART) Integrated R d 3, R a 4, and R p 7 VCONN1 VCONN2 VDDIO TCPWM1 SCB2 (I2C, SPI, UART) |
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