PRELIMINARY

Family Datasheet

Document Number: 002-09848 Rev. *B

Page 11 of 47

Pinouts

Table 1 shows the pin list for the PSoC 4XX8 BLE 4.2 device. Port 3 consists of the high-speed analog inputs for the SAR mux. All

pins support CSD CapSense and analog mux bus connections.

Table 1. PSoC 4XX8 BLE 4.2 Pin List (QFN Package)

Pin

Name

Type

Description

1

VDDD

POWER

1.71-V to 5.5-V digital supply

2

XTAL32O/P6.0

CLOCK

32.768-kHz crystal

3

XTAL32I/P6.1

CLOCK

32.768-kHz crystal or external clock input

4

XRES

RESET

Reset, active LOW

5

P4.0

GPIO

Port 4 Pin 0, lcd, csd

6

P4.1

GPIO

Port 4 Pin 1, lcd, csd

7

P5.0

GPIO

Port 5 Pin 0, lcd, csd

8

P5.1

GPIO

Port 5 Pin 1, lcd, csd

9

VSSD

GROUND

Digital ground

10

VDDR

POWER

1.9-V to 5.5-V radio supply

11

GANT1

GROUND

Antenna shielding ground

12

ANT

ANTENNA

Antenna pin

13

GANT2

GROUND

Antenna shielding ground

14

VDDR

POWER

1.9-V to 5.5-V radio supply

15

VDDR

POWER

1.9-V to 5.5-V radio supply

16

XTAL24I

CLOCK

24-MHz crystal or external clock input

17

XTAL24O

CLOCK

24-MHz crystal

18

VDDR

POWER

1.9-V to 5.5-V radio supply

19

P0.0

GPIO

Port 0 Pin 0, lcd, csd

20

P0.1

GPIO

Port 0 Pin 1, lcd, csd

21

P0.2

GPIO

Port 0 Pin 2, lcd, csd

22

P0.3

GPIO

Port 0 Pin 3, lcd, csd

23

VDDD

POWER

1.71-V to 5.5-V digital supply

24

P0.4

GPIO

Port 0 Pin 4, lcd, csd

25

P0.5

GPIO

Port 0 Pin 5, lcd, csd

26

P0.6

GPIO

Port 0 Pin 6, lcd, csd

27

P0.7

GPIO

Port 0 Pin 7, lcd, csd

28

P1.0

GPIO

Port 1 Pin 0, lcd, csd

29

P1.1

GPIO

Port 1 Pin 1, lcd, csd

30

P1.2

GPIO

Port 1 Pin 2, lcd, csd

31

P1.3

GPIO

Port 1 Pin 3, lcd, csd

32

P1.4

GPIO

Port 1 Pin 4, lcd, csd

33

P1.5

GPIO

Port 1 Pin 5, lcd, csd

34

P1.6

GPIO

Port 1 Pin 6, lcd, csd

35

P1.7

GPIO

Port 1 Pin 7, lcd, csd

36

VDDA

POWER

1.71-V to 5.5-V analog supply

37

P2.0

GPIO

Port 2 Pin 0, lcd, csd

38

P2.1

GPIO

Port 2 Pin 1, lcd, csd

39

P2.2

GPIO

Port 2 Pin 2, lcd, csd