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NCP1032 Datasheet(PDF) 3 Page - ON Semiconductor

Part # NCP1032
Description  Low Power PWM Controller
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NCP1032 Datasheet(HTML) 3 Page - ON Semiconductor

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NCP1032
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3
Table 1. FUNCTIONAL PIN DESCRIPTION
Pin
Name
Function
Description
1
GND
IC Ground
Ground reference pin for the circuit.
2
CT
Oscillator Frequency
Selection
An external capacitor connected to this pin sets the oscillator frequency up to 1 MHz. The
oscillator can be synchronized to a higher frequency by charging or discharging CT to trip the
internal 3.0 V/3.5 V comparators. If a fault condition exists, the power switch is disabled and
the frequency is reduced.
3
VFB
Feedback Signal Input
The regulated voltage is scaled down to 2.5 V by means of a resistor divider. Regulation is
achieved by comparing the scaled voltage to an internal 2.5 V reference.
4
COMP
Error Amplifier
Compensation
The output of the internal error amplifier. External compensation network between COMP
and VFB pin is required for stable operation.
5
CL
Current Limit Threshold
Selection
A resistor RCL connected between this pin and ground sets the peak current value of the
current limit. If the CL pin is left open, the current limit value is set to its initial maximum value
of approximately 12 mA (CLIM_MAX). Programmable current limit threshold, together with
internal soft−start feature effectively limits the primary transformer high current peaks during
startup phase.
6
UV/OV
Input Line Undervoltage
and Overvoltage
Shutdown
Input line voltage is scaled down using an external resistor divider. The minimum operating
Vin voltage is achieved when the voltage on UV/OV pin reaches UV threshold 1.0 V. The
maximum operating voltage is then limited by 2.4 V on UV/OV pin. A device version without
OV protection feature is available, see ordering information section.
7
VCC
Powers the Internal
Circuitry
Supplies power to the internal control circuitry. Connect an external capacitor for energy
storage during startup. The Vcc voltage should not exceed 16 V during operation.
8
VDRAIN
Drain Connection
Connects the power switch and startup circuit to the primary transformer windings.
EP
EP
Thermal Flag
This is the thermal flag for the IC and should be soldered to the ground plane.
Table 2. MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Power Switch and Startup Circuits Voltage
BVdss
−0.3 to +200
V
VCC Power Supply Voltage
VCC
−0.3 to +16
V
Power Supply Voltage on all Pins, except VDRAIN and VCC
VIO
−0.3 to +10
V
Drain Current Peak During Transformer Saturation
IDS(pk)
1.0
A
Thermal Resistance Junction−to−Air –W DFN8 3x3, case 511BH
(100 sq mm, 2oz) (Note 4)
(500 sq mm, 2oz) (Note 4)
(100 sq mm,2oz,) (Note 5)
RqJA
109
64
44
°C/W
Maximum Junction Temperature
TJMAX
150
°C
Storage Temperature Range
TSTG
−60 to +150
°C
ESD Capability, Human Body Model Pins 1−7 (Note 1)
4.0
kV
ESD Capability, Machine Model Pins 1−7 (Note 1)
400
V
Pin 8 is connected to the high voltage startup and power switch which is protected to
the maximum drain voltage
200
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. This device series contains ESD protection and passes the following tests:
Human Body Model (HBM)
± 2.0 kV per JEDEC standard: JESD22−A114.
Machine Model (MM)
± 200 V per JEDEC standard: JESD22−A115.
2. This device contains latch−up protection and it exceeds
± 100 mA per JEDEC standard: JESD78 class II
3. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020A
4. EIA JEDEC 51.3, single layer PCB with added heat spreader
5. EIA JEDEC 51.7, four layer PCB with added heat spreader


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