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TC55W800FT-55 Datasheet(PDF) 1 Page - Toshiba Semiconductor

Part No. TC55W800FT-55
Description  524,288-WORD BY 16-BIT/1,048,576-WORD BY 8-BIT FULL CMOS STATIC RAM
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Maker  TOSHIBA [Toshiba Semiconductor]
Homepage  http://www.semicon.toshiba.co.jp/eng
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TC55W800FT-55 Datasheet(HTML) 1 Page - Toshiba Semiconductor

 
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TC55W800FT-55,-70
2001-10-03
1/13
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

524,288-WORD BY 16-BIT/1,048,576-WORD BY 8-BIT FULL CMOS STATIC RAM
DESCRIPTION
The TC55W800FT is a 8,388,608-bit static random access memory (SRAM) organized as 524,288 words by 16
bits/1,048,576 words by 8 bits. Fabricated using Toshiba's CMOS Silicon gate process technology, this device
operates from a single 2.3 to 3.3 V power supply. Advanced circuit technology provides both high speed and low
power at an operating current of 3 mA/MHz and a minimum cycle time of 55 ns. It is automatically placed in
low-power mode at 0.5 mA standby current (at VDD = 3 V, Ta = 25°C, maximum) when chip enable ( CE1 ) is asserted
high or (CE2) is asserted low. There are three control inputs. CE1 and CE2 are used to select the device and for
data retention control, and output enable ( OE ) provides fast memory access. Data byte control pin ( LB , UB )
provides lower and upper byte access. This device is well suited to various microprocessor system applications
where high speed, low power and battery backup are required. And, with a guaranteed operating extreme
temperature range of -40° to 85°C, the TC55W800FT can be used in environments exhibiting extreme temperature
conditions. The TC55W800FT is available in a plastic 48-pin thin-small-outline package (TSOP).
FEATURES
· Low-power dissipation
Operating: 9.9 mW/MHz (typical)
· Single power supply voltage of 2.3 to 3.3 V
· Power down features using CE1 and CE2
· Data retention supply voltage of 1.5 to 3.3 V
· Direct TTL compatibility for all inputs and outputs
· Wide operating temperature range of -40° to 85°C
· Standby Current (maximum):
3.3 V
10
mA
3.0 V
5
mA
PIN ASSIGNMENT (TOP VIEW)
PIN NAMES
48 PIN TSOP
A0~A18
Address Inputs (Word Mode)
A-1~A18
Address Inputs (Byte Mode)
1
CE
, CE2
Chip Enable
R/W
Read/Write Control
OE
Output Enable
LB
, UB
Data Byte Control
I/O1~I/O16
Data Inputs/Outputs
BYTE
Byte (
´8 mode) Enable
VDD
Power
GND
Ground
NC
No Connection
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin Name
A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
R/W
CE2
NC
UB
LB
A18
Pin No.
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Pin Name
A17
A7
A6
A5
A4
A3
A2
A1
A0
1
CE
GND
OE
I/O1
I/O9
I/O2
I/O10
Pin No.
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Pin Name
I/O3
I/O11
I/O4
I/O12
VDD
I/O5
I/O13
I/O6
I/O14
I/O7
I/O15
I/O8
I/O16
/A-1
GND
BYTE
A16
· Access Times (maximum):
TC55W800FT
-55
-70
Access Time
55 ns
70 ns
1
CE
Access Time
55 ns
70 ns
CE2 Access Time
55 ns
70 ns
OE
Access Time
30 ns
35 ns
· Package:
TSOPⅠ48-P-1220-0.50 (Weight: 0.52 g typ)
(Normal)
25
48
24
1


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