SL28647CLC datasheet(9/27 Pages) SILABS

Part #	SL28647CLC

Description	Clock Generator for Intel짰CK505

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Manufacturer	SILABS [Silicon Laboratories]

Direct Link	http://www.silabs.com

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9 / 27 page

SL28647

.......................Document #: 001-05103 Rev *B Page 9 of 27

5

0

S1

27M_SS/LCD 96_100M SS Spread Spectrum Selection table:

S[1:0] SS%

‘00’ = –0.5%(Default value)

‘01’ = –1.0%

‘10’ = –1.5%

‘11’ = –2.0%

40

S0

3

1

RESERVED

2

1

27M_SS_OE

27M_SS Output Enable

0 =Disabled, 1 = Enabled

1

27M_SS/LCD_96M/100M

Spread Enable

27M_SS/LCD_96/100M Spread spectrum enable.

0 = Spread Disabled, 1 = Spread Enabled

0

RESERVED

Byte 10 Control Register 10 (continued)

Bit

@Pup

Name

Description

Byte 11 Control Register 11

Bit

@Pup

Name

Description

7

1

RESERVED

6

1

RESERVED

5

1

SRC9_OE

SRC9 Output Enable

0 = Disabled, 1 = Enabled

4

1

SRC8_OE

SRC8 Output Enable

0 = Disabled, 1 = Enabled

3

0

RESERVED

2

0

SRC10_STP_CTRL

Allow control of SRC10 with assertion of SW PCI_STP#

0 = Free running, 1 = Stopped with PCI_STP#

1

0

SRC9_STP_CTRL

Allow control of SRC9 with assertion of SW PCI_STP#

0 = Free running, 1 = Stopped with PCI_STP#

0

SRC8_STP_CTRL

Allow control of SRC8 with assertion of SW PCI_STP#

0 = Free running, 1 = Stopped with PCI_STP#

Byte 12 Control Register 12

Bit

@Pup

Name

Description

7

0

DIAG_EN

Diagnostic Bits Enabled

0 = Reset (default) setting bit 6, 5, 4, 2, 0 to zero

1 = DIAG mode enabled

6

HW

CPU PLL Status

CPU_PLL status

0 = PLL not locked; 1 = PLL locked

5

HW

Video PLL Status

Video_PLL status

0 = PLL not locked; 1 = PLL locked

4

HW

Fixed PLL Status

Fixed_PLL status

0 = PLL not locked; 1 = PLL locked

3

HW

PCIe PLL Status

PCIe_PLL status

0 = PLL not locked; 1 = PLL locked

2

HW

Frequency Accuracy

Primiary PLL or external crystal Frequency Accuracy

0=Frequency not accurate, 1=Frequency Accurate

1

Byte 0 Access

Byte 0 Access Control

0 = Disabled, 1 = Enabled

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